X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fmach-tegra%2Fxusb-padctl-common.c;h=c3fb30e24d1d4f6062af208cc4da2cd98457416a;hb=9e6ed1a3466ea35d98e074187abcbcfee550b448;hp=18ad7bfbdc0f7fa862bb735c4fb29827b3c9b83f;hpb=98e73c834467ef6f1d3e9a8102745e16b3128ac1;p=oweals%2Fu-boot.git diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c index 18ad7bfbdc..c3fb30e24d 100644 --- a/arch/arm/mach-tegra/xusb-padctl-common.c +++ b/arch/arm/mach-tegra/xusb-padctl-common.c @@ -1,7 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. - * - * SPDX-License-Identifier: GPL-2.0 */ #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt @@ -75,39 +74,40 @@ tegra_xusb_padctl_find_lane(struct tegra_xusb_padctl *padctl, const char *name) static int tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, struct tegra_xusb_padctl_group *group, - const void *fdt, int node) + ofnode node) { unsigned int i; - int len, err; + int len, ret; - group->name = fdt_get_name(fdt, node, &len); + group->name = ofnode_get_name(node); - len = fdt_count_strings(fdt, node, "nvidia,lanes"); + len = ofnode_read_string_count(node, "nvidia,lanes"); if (len < 0) { - error("failed to parse \"nvidia,lanes\" property"); + pr_err("failed to parse \"nvidia,lanes\" property"); return -EINVAL; } group->num_pins = len; for (i = 0; i < group->num_pins; i++) { - err = fdt_get_string_index(fdt, node, "nvidia,lanes", i, - &group->pins[i]); - if (err < 0) { - error("failed to read string from \"nvidia,lanes\" property"); + ret = ofnode_read_string_index(node, "nvidia,lanes", i, + &group->pins[i]); + if (ret) { + pr_err("failed to read string from \"nvidia,lanes\" property"); return -EINVAL; } } group->num_pins = len; - err = fdt_get_string(fdt, node, "nvidia,function", &group->func); - if (err < 0) { - error("failed to parse \"nvidia,func\" property"); + ret = ofnode_read_string_index(node, "nvidia,function", 0, + &group->func); + if (ret) { + pr_err("failed to parse \"nvidia,func\" property"); return -EINVAL; } - group->iddq = fdtdec_get_int(fdt, node, "nvidia,iddq", -1); + group->iddq = ofnode_read_u32_default(node, "nvidia,iddq", -1); return 0; } @@ -156,14 +156,14 @@ tegra_xusb_padctl_group_apply(struct tegra_xusb_padctl *padctl, lane = tegra_xusb_padctl_find_lane(padctl, group->pins[i]); if (!lane) { - error("no lane for pin %s", group->pins[i]); + pr_err("no lane for pin %s", group->pins[i]); continue; } func = tegra_xusb_padctl_lane_find_function(padctl, lane, group->func); if (func < 0) { - error("function %s invalid for lane %s: %d", + pr_err("function %s invalid for lane %s: %d", group->func, lane->name, func); continue; } @@ -205,7 +205,7 @@ tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_group_apply(padctl, group); if (err < 0) { - error("failed to apply group %s: %d", + pr_err("failed to apply group %s: %d", group->name, err); continue; } @@ -217,22 +217,21 @@ tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl, static int tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl, struct tegra_xusb_padctl_config *config, - const void *fdt, int node) + ofnode node) { - int subnode; + ofnode subnode; - config->name = fdt_get_name(fdt, node, NULL); + config->name = ofnode_get_name(node); - fdt_for_each_subnode(fdt, subnode, node) { + ofnode_for_each_subnode(subnode, node) { struct tegra_xusb_padctl_group *group; int err; group = &config->groups[config->num_groups]; - err = tegra_xusb_padctl_group_parse_dt(padctl, group, fdt, - subnode); + err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode); if (err < 0) { - error("failed to parse group %s", group->name); + pr_err("failed to parse group %s", group->name); return err; } @@ -243,48 +242,53 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl, } static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, - const void *fdt, int node) + ofnode node) { - int subnode, err; + ofnode subnode; + int err; - err = fdt_get_resource(fdt, node, "reg", 0, &padctl->regs); + err = ofnode_read_resource(node, 0, &padctl->regs); if (err < 0) { - error("registers not found"); + pr_err("registers not found"); return err; } - fdt_for_each_subnode(fdt, subnode, node) { + ofnode_for_each_subnode(subnode, node) { struct tegra_xusb_padctl_config *config = &padctl->config; - err = tegra_xusb_padctl_config_parse_dt(padctl, config, fdt, + debug("%s: subnode=%s\n", __func__, ofnode_get_name(subnode)); + err = tegra_xusb_padctl_config_parse_dt(padctl, config, subnode); if (err < 0) { - error("failed to parse entry %s: %d", + pr_err("failed to parse entry %s: %d", config->name, err); continue; } } + debug("%s: done\n", __func__); return 0; } struct tegra_xusb_padctl padctl; -int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count, - const struct tegra_xusb_padctl_soc *socdata) +int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count, + const struct tegra_xusb_padctl_soc *socdata) { unsigned int i; int err; + debug("%s: count=%d\n", __func__, count); for (i = 0; i < count; i++) { - if (!fdtdec_get_is_enabled(fdt, nodes[i])) + debug("%s: i=%d, node=%p\n", __func__, i, nodes[i].np); + if (!ofnode_is_available(nodes[i])) continue; padctl.socdata = socdata; - err = tegra_xusb_padctl_parse_dt(&padctl, fdt, nodes[i]); + err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]); if (err < 0) { - error("failed to parse DT: %d", err); + pr_err("failed to parse DT: %d", err); continue; } @@ -293,13 +297,14 @@ int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count, err = tegra_xusb_padctl_config_apply(&padctl, &padctl.config); if (err < 0) { - error("failed to apply pinmux: %d", err); + pr_err("failed to apply pinmux: %d", err); continue; } /* only a single instance is supported */ break; } + debug("%s: done\n", __func__); return 0; }