X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fmach-socfpga%2FMakefile;h=e66720447f85e22d9c4c97f6ffb24e005e09dc37;hb=68907a0a58fd8299b18c01e2e3445d90fee85a3d;hp=809cd47947a37f6a16f4a67a5dab94f2f127917a;hpb=f1993ca066100fcaba7d49fecae0ef604e5807e2;p=oweals%2Fu-boot.git

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 809cd47947..e66720447f 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -1,22 +1,65 @@
+# SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2000-2003
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
-# Copyright (C) 2012 Altera Corporation <www.altera.com>
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
+# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
+
+obj-y	+= board.o
+obj-y	+= clock_manager.o
+obj-y	+= misc.o
+obj-y	+= reset_manager.o
+
+ifdef CONFIG_TARGET_SOCFPGA_GEN5
+obj-y	+= clock_manager_gen5.o
+obj-y	+= misc_gen5.o
+obj-y	+= reset_manager_gen5.o
+obj-y	+= scan_manager.o
+obj-y	+= system_manager_gen5.o
+obj-y	+= timer.o
+obj-y	+= wrap_pll_config.o
+obj-y	+= fpga_manager.o
+endif
+
+ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
+obj-y	+= clock_manager_arria10.o
+obj-y	+= misc_arria10.o
+obj-y	+= pinmux_arria10.o
+obj-y	+= reset_manager_arria10.o
+endif
 
-obj-y	+= misc.o timer.o reset_manager.o system_manager.o clock_manager.o \
-	   fpga_manager.o board.o
+ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
+obj-y	+= clock_manager_s10.o
+obj-y	+= mailbox_s10.o
+obj-y	+= misc_s10.o
+obj-y	+= mmu-arm64_s10.o
+obj-y	+= reset_manager_s10.o
+obj-y	+= system_manager_s10.o
+obj-y	+= timer_s10.o
+obj-y	+= wrap_pinmux_config_s10.o
+obj-y	+= wrap_pll_config_s10.o
+endif
 
-obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_TARGET_SOCFPGA_GEN5
+obj-y	+= spl_gen5.o
+obj-y	+= freeze_controller.o
+obj-y	+= wrap_iocsr_config.o
+obj-y	+= wrap_pinmux_config.o
+obj-y	+= wrap_sdram_config.o
+endif
+ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
+obj-y	+= spl_a10.o
+endif
+ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
+obj-y	+= spl_s10.o
+endif
+endif
 
+ifdef CONFIG_TARGET_SOCFPGA_GEN5
 # QTS-generated config file wrappers
-obj-$(CONFIG_TARGET_SOCFPGA_GEN5)	+= scan_manager.o wrap_pll_config.o
-obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o wrap_pinmux_config.o	\
-			   wrap_sdram_config.o
 CFLAGS_wrap_iocsr_config.o	+= -I$(srctree)/board/$(BOARDDIR)
 CFLAGS_wrap_pinmux_config.o	+= -I$(srctree)/board/$(BOARDDIR)
 CFLAGS_wrap_pll_config.o	+= -I$(srctree)/board/$(BOARDDIR)
 CFLAGS_wrap_sdram_config.o	+= -I$(srctree)/board/$(BOARDDIR)
+endif