X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fmach-imx%2Fimx_bootaux.c;h=868633cf8a47d51ee9e8855e8f9d98a5b7833862;hb=c27178ba3649f539c9f1890ea147f4c5415f63b5;hp=a1ea5c13f124df51f336886d00d7a4653b5d5e6a;hpb=e8f80a5a58c9b506453cc0780687e8ed457d30a6;p=oweals%2Fu-boot.git

diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
index a1ea5c13f1..868633cf8a 100644
--- a/arch/arm/mach-imx/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx_bootaux.c
@@ -4,29 +4,58 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/mach-imx/sys_proto.h>
 #include <command.h>
+#include <elf.h>
 #include <imx_sip.h>
 #include <linux/compiler.h>
+#include <cpu_func.h>
 
-int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
+int arch_auxiliary_core_up(u32 core_id, ulong addr)
 {
 	ulong stack, pc;
 
-	if (!boot_private_data)
+	if (!addr)
 		return -EINVAL;
 
-	stack = *(ulong *)boot_private_data;
-	pc = *(ulong *)(boot_private_data + 4);
+#ifdef CONFIG_IMX8M
+	stack = *(u32 *)addr;
+	pc = *(u32 *)(addr + 4);
+#else
+	/*
+	 * handling ELF64 binaries
+	 * isn't supported yet.
+	 */
+	if (valid_elf_image(addr)) {
+		stack = 0x0;
+		pc = load_elf_image_phdr(addr);
+		if (!pc)
+			return CMD_RET_FAILURE;
+
+	} else {
+		/*
+		 * Assume binary file with vector table at the beginning.
+		 * Cortex-M4 vector tables start with the stack pointer (SP)
+		 * and reset vector (initial PC).
+		 */
+		stack = *(u32 *)addr;
+		pc = *(u32 *)(addr + 4);
+	}
+#endif
+	printf("## Starting auxiliary core stack = 0x%08lX, pc = 0x%08lX...\n",
+	       stack, pc);
 
 	/* Set the stack and pc to M4 bootROM */
 	writel(stack, M4_BOOTROM_BASE_ADDR);
 	writel(pc, M4_BOOTROM_BASE_ADDR + 4);
 
+	flush_dcache_all();
+
 	/* Enable M4 */
-#ifdef CONFIG_MX8M
-	call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0);
+#ifdef CONFIG_IMX8M
+	call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0);
 #else
 	clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
 			SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
@@ -37,8 +66,8 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
 
 int arch_auxiliary_core_check_up(u32 core_id)
 {
-#ifdef CONFIG_MX8M
-	return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0);
+#ifdef CONFIG_IMX8M
+	return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0);
 #else
 	unsigned int val;
 
@@ -64,7 +93,8 @@ int arch_auxiliary_core_check_up(u32 core_id)
  * The TCMUL is mapped to (M4_BOOTROM_BASE_ADDR) at A core side for
  * accessing the M4 TCMUL.
  */
-static int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_bootaux(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	ulong addr;
 	int ret, up;
@@ -80,7 +110,8 @@ static int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	addr = simple_strtoul(argv[1], NULL, 16);
 
-	printf("## Starting auxiliary core at 0x%08lX ...\n", addr);
+	if (!addr)
+		return CMD_RET_FAILURE;
 
 	ret = arch_auxiliary_core_up(0, addr);
 	if (ret)