X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fmach-at91%2Finclude%2Fmach%2Fat91_pmc.h;h=680ceb03145d6f8f0217d4ee52997f3dfd65b66c;hb=6beacfcff81bdc04c10a440971b0fb683ee57534;hp=3f50f7718ff5ce6b2c34828001bd883b91572661;hpb=a85670e40da1ef4f299effb73c36e48d39d50106;p=oweals%2Fu-boot.git

diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 3f50f7718f..680ceb0314 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -51,19 +51,15 @@ typedef struct at91_pmc {
 	u32	imr;		/* 0x6C Interrupt Mask Register */
 	u32	reserved4[4];
 	u32	pllicpr;	/* 0x80 Change Pump Current Register (SAM9) */
-	u32	reserved5[21];
+	u32	reserved5[24];
 	u32	wpmr;		/* 0xE4 Write Protect Mode Register (CAP0) */
 	u32	wpsr;		/* 0xE8 Write Protect Status Register (CAP0) */
-#ifdef CPU_HAS_PCR
-	u32	reserved6[8];
+	u32	reserved6[5];
 	u32	pcer1;		/* 0x100 Periperial Clock Enable Register 1 */
 	u32	pcdr1;		/* 0x104 Periperial Clock Disable Register 1 */
 	u32	pcsr1;		/* 0x108 Periperial Clock Status Register 1 */
 	u32	pcr;		/* 0x10c Periperial Control Register */
 	u32	ocr;		/* 0x110 Oscillator Calibration Register */
-#else
-	u32	reserved8[5];
-#endif
 } at91_pmc_t;
 
 #endif	/* end not assembly */
@@ -71,18 +67,18 @@ typedef struct at91_pmc {
 #define AT91_PMC_MOR_MOSCEN		0x01
 #define AT91_PMC_MOR_OSCBYPASS		0x02
 #define AT91_PMC_MOR_MOSCRCEN		0x08
-#define AT91_PMC_MOR_OSCOUNT(x)		((x & 0xff) << 8)
-#define AT91_PMC_MOR_KEY(x)		((x & 0xff) << 16)
+#define AT91_PMC_MOR_OSCOUNT(x)		(((x) & 0xff) << 8)
+#define AT91_PMC_MOR_KEY(x)		(((x) & 0xff) << 16)
 #define AT91_PMC_MOR_MOSCSEL		(1 << 24)
 
-#define AT91_PMC_PLLXR_DIV(x)		(x & 0xFF)
-#define AT91_PMC_PLLXR_PLLCOUNT(x)	((x & 0x3F) << 8)
-#define AT91_PMC_PLLXR_OUT(x)		((x & 0x03) << 14)
+#define AT91_PMC_PLLXR_DIV(x)		((x) & 0xFF)
+#define AT91_PMC_PLLXR_PLLCOUNT(x)	(((x) & 0x3F) << 8)
+#define AT91_PMC_PLLXR_OUT(x)		(((x) & 0x03) << 14)
 #if defined(CONFIG_SAMA5D2) || defined(CONFIG_SAMA5D3) || \
 	defined(CONFIG_SAMA5D4)
-#define AT91_PMC_PLLXR_MUL(x)		((x & 0x7F) << 18)
+#define AT91_PMC_PLLXR_MUL(x)		(((x) & 0x7F) << 18)
 #else
-#define AT91_PMC_PLLXR_MUL(x)		((x & 0x7FF) << 16)
+#define AT91_PMC_PLLXR_MUL(x)		(((x) & 0x7FF) << 16)
 #endif
 #define AT91_PMC_PLLAR_29		0x20000000
 #define AT91_PMC_PLLBR_USBDIV_1		0x00000000
@@ -162,7 +158,7 @@ typedef struct at91_pmc {
 #define AT91_PMC_PCR_CMD_WRITE		(0x1 << 12)
 #define AT91_PMC_PCR_DIV		(0x3 << 16)
 #define AT91_PMC_PCR_GCKDIV		(0xff << 20)
-#define		AT91_PMC_PCR_GCKDIV_(x)		((x & 0xff) << 20)
+#define		AT91_PMC_PCR_GCKDIV_(x)		(((x) & 0xff) << 20)
 #define		AT91_PMC_PCR_GCKDIV_OFFSET	20
 #define AT91_PMC_PCR_EN			(0x1 << 28)
 #define AT91_PMC_PCR_GCKEN		(0x1 << 29)
@@ -250,4 +246,11 @@ typedef struct at91_pmc {
 #define		AT91_PMC_GCKRDY		(1 << 24)
 
 #define		AT91_PMC_PROTKEY	0x504d4301	/* Activation Code */
+
+/* PLL Charge Pump Current Register (PMC_PLLICPR) */
+#define AT91_PMC_ICP_PLLA(x)		(((x) & 0x3) << 0)
+#define AT91_PMC_IPLL_PLLA(x)		(((x) & 0x7) << 8)
+#define AT91_PMC_ICP_PLLU(x)		(((x) & 0x3) << 16)
+#define AT91_PMC_IVCO_PLLU(x)		(((x) & 0x3) << 24)
+
 #endif