X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Fcache.h;h=16e65c36a9a5dacefadd4281b30a8a4d4bc77c41;hb=397b5697ad242408979a00dda14138aa1439f52b;hp=ddebbc8fcdc40c937d43b8cf08f67959b7613384;hpb=bf46e7d8d134521301ff02b6d97e8998aa10a83d;p=oweals%2Fu-boot.git

diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index ddebbc8fcd..16e65c36a9 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -16,6 +16,9 @@
 /*
  * Invalidate L2 Cache using co-proc instruction
  */
+#ifdef CONFIG_SYS_THUMB_BUILD
+void invalidate_l2_cache(void);
+#else
 static inline void invalidate_l2_cache(void)
 {
 	unsigned int val=0;
@@ -24,11 +27,17 @@ static inline void invalidate_l2_cache(void)
 		: : "r" (val) : "cc");
 	isb();
 }
+#endif
+
+int check_cache_range(unsigned long start, unsigned long stop);
 
 void l2_cache_enable(void);
 void l2_cache_disable(void);
 void set_section_dcache(int section, enum dcache_option option);
 
+void arm_init_before_mmu(void);
+void arm_init_domains(void);
+void cpu_cache_initialization(void);
 void dram_bank_mmu_setup(int bank);
 
 #endif