X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-omap4%2Fomap.h;h=d43dc265cd68f952897d07b39fbf691fbe281fdf;hb=a906847966fd097835712b2ad3b5bac340793d43;hp=3823a37f2ff00770dacdd419e85d7fefe160ee8f;hpb=5b9c79a81db80c3f9e50c77477957cd803429af8;p=oweals%2Fu-boot.git

diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 3823a37f2f..d43dc265cd 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -33,6 +33,10 @@
 
 /* CONTROL_ID_CODE */
 #define CONTROL_ID_CODE		0x4A002204
+#define STD_FUSE_DIE_ID_0	0x4A002200
+#define STD_FUSE_DIE_ID_1	0x4A002208
+#define STD_FUSE_DIE_ID_2	0x4A00220c
+#define STD_FUSE_DIE_ID_3	0x4A002210
 
 #define OMAP4_CONTROL_ID_CODE_ES1_0	0x0B85202F
 #define OMAP4_CONTROL_ID_CODE_ES2_0	0x1B85202F
@@ -41,6 +45,7 @@
 #define OMAP4_CONTROL_ID_CODE_ES2_3	0x6B95C02F
 #define OMAP4460_CONTROL_ID_CODE_ES1_0	0x0B94E02F
 #define OMAP4460_CONTROL_ID_CODE_ES1_1	0x2B94E02F
+#define OMAP4470_CONTROL_ID_CODE_ES1_0	0x0B97502F
 
 /* UART */
 #define UART1_BASE		(OMAP44XX_L4_PER_BASE + 0x6a000)
@@ -55,9 +60,6 @@
 /* Watchdog Timer2 - MPU watchdog */
 #define WDT2_BASE		(OMAP44XX_L4_WKUP_BASE + 0x14000)
 
-/* GPMC */
-#define OMAP44XX_GPMC_BASE	0x50000000
-
 /*
  * Hardware Register Details
  */
@@ -111,7 +113,7 @@ struct s32ktimer {
  */
 #define NON_SECURE_SRAM_START	0x40304000
 #define NON_SECURE_SRAM_END	0x4030E000	/* Not inclusive */
-#define SRAM_SCRATCH_SPACE_ADDR	NON_SECURE_SRAM_START
+#define SRAM_SCRATCH_SPACE_ADDR	0x4030C000
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE	0x4030D000