X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fimx-common%2Ftimer.c;h=ee6eff2b28cada0fca04044a90873246d879454f;hb=36737f22b78a475c6bbc8a0467b51e4d95b52a7d;hp=c63f78f6823cee5432e395bc8a7550564a6dee58;hpb=3be2bdf5dc69b3142c1162a59bc67191c9077567;p=oweals%2Fu-boot.git

diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index c63f78f682..ee6eff2b28 100644
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -12,6 +12,7 @@
 #include <div64.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
 
 /* General purpose timers registers */
 struct mxc_gpt {
@@ -26,26 +27,43 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
 
 /* General purpose timers bitfields */
 #define GPTCR_SWR		(1 << 15)	/* Software reset */
+#define GPTCR_24MEN	    (1 << 10)	/* Enable 24MHz clock input */
 #define GPTCR_FRR		(1 << 9)	/* Freerun / restart */
-#define GPTCR_CLKSOURCE_32	(4 << 6)	/* Clock source */
+#define GPTCR_CLKSOURCE_32	(4 << 6)	/* Clock source 32khz */
+#define GPTCR_CLKSOURCE_OSC	(5 << 6)	/* Clock source OSC */
+#define GPTCR_CLKSOURCE_PRE	(1 << 6)	/* Clock source PRECLK */
+#define GPTCR_CLKSOURCE_MASK (0x7 << 6)
 #define GPTCR_TEN		1		/* Timer enable */
 
+#define GPTPR_PRESCALER24M_SHIFT 12
+#define GPTPR_PRESCALER24M_MASK (0xF << GPTPR_PRESCALER24M_SHIFT)
+
 DECLARE_GLOBAL_DATA_PTR;
 
-static inline unsigned long long tick_to_time(unsigned long long tick)
+static inline int gpt_has_clk_source_osc(void)
 {
-	tick *= CONFIG_SYS_HZ;
-	do_div(tick, MXC_CLK32);
+#if defined(CONFIG_MX6)
+	if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) ||
+	    is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul() ||
+	    is_mx6ull() || is_mx6sll())
+		return 1;
 
-	return tick;
+	return 0;
+#else
+	return 0;
+#endif
 }
 
-static inline unsigned long long us_to_tick(unsigned long long usec)
+static inline ulong gpt_get_clk(void)
 {
-	usec = usec * MXC_CLK32 + 999999;
-	do_div(usec, 1000000);
-
-	return usec;
+#ifdef CONFIG_MXC_GPT_HCLK
+	if (gpt_has_clk_source_osc())
+		return MXC_HCLK >> 3;
+	else
+		return mxc_get_clock(MXC_IPG_PERCLK);
+#else
+	return MXC_CLK32;
+#endif
 }
 
 int timer_init(void)
@@ -59,11 +77,33 @@ int timer_init(void)
 	for (i = 0; i < 100; i++)
 		__raw_writel(0, &cur_gpt->control);
 
-	__raw_writel(0, &cur_gpt->prescaler); /* 32Khz */
-
-	/* Freerun Mode, PERCLK1 input */
 	i = __raw_readl(&cur_gpt->control);
-	__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
+	i &= ~GPTCR_CLKSOURCE_MASK;
+
+#ifdef CONFIG_MXC_GPT_HCLK
+	if (gpt_has_clk_source_osc()) {
+		i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
+
+		/*
+		 * For DL/S, SX, UL, ULL, SLL set 24Mhz OSC
+		 * Enable bit and prescaler
+		 */
+		if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull() ||
+		    is_mx6sll()) {
+			i |= GPTCR_24MEN;
+
+			/* Produce 3Mhz clock */
+			__raw_writel((7 << GPTPR_PRESCALER24M_SHIFT),
+				     &cur_gpt->prescaler);
+		}
+	} else {
+		i |= GPTCR_CLKSOURCE_PRE | GPTCR_TEN;
+	}
+#else
+	__raw_writel(0, &cur_gpt->prescaler); /* 32Khz */
+	i |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
+#endif
+	__raw_writel(i, &cur_gpt->control);
 
 	gd->arch.tbl = __raw_readl(&cur_gpt->counter);
 	gd->arch.tbu = 0;
@@ -71,44 +111,9 @@ int timer_init(void)
 	return 0;
 }
 
-unsigned long long get_ticks(void)
-{
-	ulong now = __raw_readl(&cur_gpt->counter); /* current tick value */
-
-	/* increment tbu if tbl has rolled over */
-	if (now < gd->arch.tbl)
-		gd->arch.tbu++;
-	gd->arch.tbl = now;
-	return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
-}
-
-ulong get_timer_masked(void)
-{
-	/*
-	 * get_ticks() returns a long long (64 bit), it wraps in
-	 * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
-	 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
-	 * 5 * 10^6 days - long enough.
-	 */
-	return tick_to_time(get_ticks());
-}
-
-ulong get_timer(ulong base)
-{
-	return get_timer_masked() - base;
-}
-
-/* delay x useconds AND preserve advance timstamp value */
-void __udelay(unsigned long usec)
+unsigned long timer_read_counter(void)
 {
-	unsigned long long tmp;
-	ulong tmo;
-
-	tmo = us_to_tick(usec);
-	tmp = get_ticks() + tmo;	/* get current timestamp */
-
-	while (get_ticks() < tmp)	/* loop till event */
-		 /*NOP*/;
+	return __raw_readl(&cur_gpt->counter); /* current tick value */
 }
 
 /*
@@ -117,5 +122,21 @@ void __udelay(unsigned long usec)
  */
 ulong get_tbclk(void)
 {
-	return MXC_CLK32;
+	return gpt_get_clk();
+}
+
+/*
+ * This function is intended for SHORT delays only.
+ * It will overflow at around 10 seconds @ 400MHz,
+ * or 20 seconds @ 200MHz.
+ */
+unsigned long usec2ticks(unsigned long _usec)
+{
+	unsigned long long usec = _usec;
+
+	usec *= get_tbclk();
+	usec += 999999;
+	do_div(usec, 1000000);
+
+	return usec;
 }