X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fzynqmp.dtsi;h=1fd570bc2fa0e9181105425e785d50441b67dd80;hb=dd9999d5f4d3a0354c959fa3bccc0957a1164bf5;hp=24a34e6d85d2e5c8ecf1e38a62f89608835a9154;hpb=60b25259a5540686add02cf6c94cd7494a3e2d23;p=oweals%2Fu-boot.git diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 24a34e6d85..1fd570bc2f 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -7,10 +7,11 @@ * * SPDX-License-Identifier: GPL-2.0+ */ + / { compatible = "xlnx,zynqmp"; #address-cells = <2>; - #size-cells = <1>; + #size-cells = <2>; cpus { #address-cells = <1>; @@ -21,6 +22,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x0>; + cpu-idle-states = <&CPU_SLEEP_0>; }; cpu@1 { @@ -28,6 +30,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x1>; + cpu-idle-states = <&CPU_SLEEP_0>; }; cpu@2 { @@ -35,6 +38,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x2>; + cpu-idle-states = <&CPU_SLEEP_0>; }; cpu@3 { @@ -42,11 +46,182 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x3>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + + idle-states { + entry-mehod = "arm,psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x40000000>; + local-timer-stop; + entry-latency-us = <300>; + exit-latency-us = <600>; + min-residency-us = <800000>; + }; + }; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + + power-domains { + compatible = "xlnx,zynqmp-genpd"; + + pd_usb0: pd-usb0 { + #power-domain-cells = <0x0>; + pd-id = <0x16>; + }; + + pd_usb1: pd-usb1 { + #power-domain-cells = <0x0>; + pd-id = <0x17>; + }; + + pd_sata: pd-sata { + #power-domain-cells = <0x0>; + pd-id = <0x1c>; + }; + + pd_spi0: pd-spi0 { + #power-domain-cells = <0x0>; + pd-id = <0x23>; + }; + + pd_spi1: pd-spi1 { + #power-domain-cells = <0x0>; + pd-id = <0x24>; + }; + + pd_uart0: pd-uart0 { + #power-domain-cells = <0x0>; + pd-id = <0x21>; + }; + + pd_uart1: pd-uart1 { + #power-domain-cells = <0x0>; + pd-id = <0x22>; + }; + + pd_eth0: pd-eth0 { + #power-domain-cells = <0x0>; + pd-id = <0x1d>; + }; + + pd_eth1: pd-eth1 { + #power-domain-cells = <0x0>; + pd-id = <0x1e>; + }; + + pd_eth2: pd-eth2 { + #power-domain-cells = <0x0>; + pd-id = <0x1f>; + }; + + pd_eth3: pd-eth3 { + #power-domain-cells = <0x0>; + pd-id = <0x20>; + }; + + pd_i2c0: pd-i2c0 { + #power-domain-cells = <0x0>; + pd-id = <0x25>; + }; + + pd_i2c1: pd-i2c1 { + #power-domain-cells = <0x0>; + pd-id = <0x26>; + }; + + pd_dp: pd-dp { + /* fixme: what to attach to */ + #power-domain-cells = <0x0>; + pd-id = <0x29>; + }; + + pd_gdma: pd-gdma { + #power-domain-cells = <0x0>; + pd-id = <0x2a>; + }; + + pd_adma: pd-adma { + #power-domain-cells = <0x0>; + pd-id = <0x2b>; + }; + + pd_ttc0: pd-ttc0 { + #power-domain-cells = <0x0>; + pd-id = <0x18>; + }; + + pd_ttc1: pd-ttc1 { + #power-domain-cells = <0x0>; + pd-id = <0x19>; + }; + + pd_ttc2: pd-ttc2 { + #power-domain-cells = <0x0>; + pd-id = <0x1a>; + }; + + pd_ttc3: pd-ttc3 { + #power-domain-cells = <0x0>; + pd-id = <0x1b>; + }; + + pd_sd0: pd-sd0 { + #power-domain-cells = <0x0>; + pd-id = <0x27>; + }; + + pd_sd1: pd-sd1 { + #power-domain-cells = <0x0>; + pd-id = <0x28>; + }; + + pd_nand: pd-nand { + #power-domain-cells = <0x0>; + pd-id = <0x2c>; + }; + + pd_qspi: pd-qspi { + #power-domain-cells = <0x0>; + pd-id = <0x2d>; + }; + + pd_gpio: pd-gpio { + #power-domain-cells = <0x0>; + pd-id = <0x2e>; + }; + + pd_can0: pd-can0 { + #power-domain-cells = <0x0>; + pd-id = <0x2f>; + }; + + pd_can1: pd-can1 { + #power-domain-cells = <0x0>; + pd-id = <0x30>; + }; + + pd_pcie: pd-pcie { + #power-domain-cells = <0x0>; + pd-id = <0x3b>; + }; + + pd_gpu: pd-gpu { + #power-domain-cells = <0x0>; + pd-id = <0x3a 0x14 0x15>; }; }; pmu { compatible = "arm,armv8-pmuv3"; + interrupt-parent = <&gic>; interrupts = <0 143 4>, <0 144 4>, <0 145 4>, @@ -72,19 +247,27 @@ <1 10 0xf01>; }; - amba_apu: amba_apu { + edac { + compatible = "arm,cortex-a53-edac"; + }; + + pcap { + compatible = "xlnx,zynqmp-pcap-fpga"; + }; + + amba_apu: amba_apu@0 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; - ranges; + ranges = <0 0 0 0 0xffffffff>; gic: interrupt-controller@f9010000 { compatible = "arm,gic-400", "arm,cortex-a15-gic"; #interrupt-cells = <3>; reg = <0x0 0xf9010000 0x10000>, - <0x0 0xf902f000 0x2000>, + <0x0 0xf9020000 0x20000>, <0x0 0xf9040000 0x20000>, - <0x0 0xf906f000 0x2000>; + <0x0 0xf9060000 0x20000>; interrupt-controller; interrupt-parent = <&gic>; interrupts = <1 9 0xf04>; @@ -93,264 +276,352 @@ amba: amba { compatible = "simple-bus"; + u-boot,dm-pre-reloc; #address-cells = <2>; - #size-cells = <1>; + #size-cells = <2>; ranges; can0: can@ff060000 { compatible = "xlnx,zynq-can-1.0"; status = "disabled"; clock-names = "can_clk", "pclk"; - reg = <0x0 0xff060000 0x1000>; + reg = <0x0 0xff060000 0x0 0x1000>; interrupts = <0 23 4>; interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + power-domains = <&pd_can0>; }; can1: can@ff070000 { compatible = "xlnx,zynq-can-1.0"; status = "disabled"; clock-names = "can_clk", "pclk"; - reg = <0x0 0xff070000 0x1000>; + reg = <0x0 0xff070000 0x0 0x1000>; interrupts = <0 24 4>; interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + power-domains = <&pd_can1>; + }; + + cci: cci@fd6e0000 { + compatible = "arm,cci-400"; + reg = <0x0 0xfd6e0000 0x0 0x9000>; + ranges = <0x0 0x0 0xfd6e0000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + pmu@9000 { + compatible = "arm,cci-400-pmu,r1"; + reg = <0x9000 0x5000>; + interrupt-parent = <&gic>; + interrupts = <0 123 4>, + <0 123 4>, + <0 123 4>, + <0 123 4>, + <0 123 4>; + }; }; /* GDMA */ fpd_dma_chan1: dma@fd500000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd500000 0x1000>; + reg = <0x0 0xfd500000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 124 4>; - xlnx,id = <0>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14e8>; + power-domains = <&pd_gdma>; }; fpd_dma_chan2: dma@fd510000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd510000 0x1000>; + reg = <0x0 0xfd510000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 125 4>; - xlnx,id = <1>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14e9>; + power-domains = <&pd_gdma>; }; fpd_dma_chan3: dma@fd520000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd520000 0x1000>; + reg = <0x0 0xfd520000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 126 4>; - xlnx,id = <2>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ea>; + power-domains = <&pd_gdma>; }; fpd_dma_chan4: dma@fd530000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd530000 0x1000>; + reg = <0x0 0xfd530000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 127 4>; - xlnx,id = <3>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14eb>; + power-domains = <&pd_gdma>; }; fpd_dma_chan5: dma@fd540000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd540000 0x1000>; + reg = <0x0 0xfd540000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 128 4>; - xlnx,id = <4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ec>; + power-domains = <&pd_gdma>; }; fpd_dma_chan6: dma@fd550000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd550000 0x1000>; + reg = <0x0 0xfd550000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 129 4>; - xlnx,id = <5>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ed>; + power-domains = <&pd_gdma>; }; fpd_dma_chan7: dma@fd560000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd560000 0x1000>; + reg = <0x0 0xfd560000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 130 4>; - xlnx,id = <6>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ee>; + power-domains = <&pd_gdma>; }; fpd_dma_chan8: dma@fd570000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xfd570000 0x1000>; + reg = <0x0 0xfd570000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 131 4>; - xlnx,id = <7>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ef>; + power-domains = <&pd_gdma>; }; gpu: gpu@fd4b0000 { status = "disabled"; compatible = "arm,mali-400", "arm,mali-utgard"; - reg = <0x0 0xfd4b0000 0x30000>; + reg = <0x0 0xfd4b0000 0x0 0x30000>; interrupt-parent = <&gic>; interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; + power-domains = <&pd_gpu>; }; - /* ADMA */ + /* LPDDMA default allows only secured access. inorder to enable + * These dma channels, Users should ensure that these dma + * Channels are allowed for non secure access. + */ lpd_dma_chan1: dma@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffa80000 0x1000>; + clock-names = "clk_main", "clk_apb"; + reg = <0x0 0xffa80000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 4>; - xlnx,id = <0>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x868>; + power-domains = <&pd_adma>; }; lpd_dma_chan2: dma@ffa90000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffa90000 0x1000>; + clock-names = "clk_main", "clk_apb"; + reg = <0x0 0xffa90000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 78 4>; - xlnx,id = <1>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x869>; + power-domains = <&pd_adma>; }; lpd_dma_chan3: dma@ffaa0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffaa0000 0x1000>; + clock-names = "clk_main", "clk_apb"; + reg = <0x0 0xffaa0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 79 4>; - xlnx,id = <2>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86a>; + power-domains = <&pd_adma>; }; lpd_dma_chan4: dma@ffab0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffab0000 0x1000>; + clock-names = "clk_main", "clk_apb"; + reg = <0x0 0xffab0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 80 4>; - xlnx,id = <3>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86b>; + power-domains = <&pd_adma>; }; lpd_dma_chan5: dma@ffac0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffac0000 0x1000>; + clock-names = "clk_main", "clk_apb"; + reg = <0x0 0xffac0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 81 4>; - xlnx,id = <4>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86c>; + power-domains = <&pd_adma>; }; lpd_dma_chan6: dma@ffad0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffad0000 0x1000>; + clock-names = "clk_main", "clk_apb"; + reg = <0x0 0xffad0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 82 4>; - xlnx,id = <5>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86d>; + power-domains = <&pd_adma>; }; lpd_dma_chan7: dma@ffae0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffae0000 0x1000>; + clock-names = "clk_main", "clk_apb"; + reg = <0x0 0xffae0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 83 4>; - xlnx,id = <6>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86e>; + power-domains = <&pd_adma>; }; lpd_dma_chan8: dma@ffaf0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - reg = <0x0 0xffaf0000 0x1000>; + clock-names = "clk_main", "clk_apb"; + reg = <0x0 0xffaf0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 84 4>; - xlnx,id = <7>; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + iommus = <&smmu 0x86f>; + power-domains = <&pd_adma>; + }; + + mc: memory-controller@fd070000 { + compatible = "xlnx,zynqmp-ddrc-2.40a"; + reg = <0x0 0xfd070000 0x0 0x30000>; + interrupt-parent = <&gic>; + interrupts = <0 112 4>; }; nand0: nand@ff100000 { compatible = "arasan,nfc-v3p10"; status = "disabled"; - reg = <0x0 0xff100000 0x1000>; + reg = <0x0 0xff100000 0x0 0x1000>; clock-names = "clk_sys", "clk_flash"; interrupt-parent = <&gic>; interrupts = <0 14 4>; #address-cells = <2>; #size-cells = <1>; + #stream-id-cells = <1>; + iommus = <&smmu 0x872>; + power-domains = <&pd_nand>; }; gem0: ethernet@ff0b0000 { - compatible = "cdns,gem"; + compatible = "cdns,zynqmp-gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 57 4>, <0 57 4>; - reg = <0x0 0xff0b0000 0x1000>; + reg = <0x0 0xff0b0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; - jumbo-max-len = <10240>; - jumbo-supported; + #stream-id-cells = <1>; + iommus = <&smmu 0x874>; + power-domains = <&pd_eth0>; }; gem1: ethernet@ff0c0000 { - compatible = "cdns,gem"; + compatible = "cdns,zynqmp-gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 59 4>, <0 59 4>; - reg = <0x0 0xff0c0000 0x1000>; + reg = <0x0 0xff0c0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; - jumbo-max-len = <10240>; - jumbo-supported; + #stream-id-cells = <1>; + iommus = <&smmu 0x875>; + power-domains = <&pd_eth1>; }; gem2: ethernet@ff0d0000 { - compatible = "cdns,gem"; + compatible = "cdns,zynqmp-gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 61 4>, <0 61 4>; - reg = <0x0 0xff0d0000 0x1000>; + reg = <0x0 0xff0d0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; - jumbo-max-len = <10240>; - jumbo-supported; + #stream-id-cells = <1>; + iommus = <&smmu 0x876>; + power-domains = <&pd_eth2>; }; gem3: ethernet@ff0e0000 { - compatible = "cdns,gem"; + compatible = "cdns,zynqmp-gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 63 4>, <0 63 4>; - reg = <0x0 0xff0e0000 0x1000>; + reg = <0x0 0xff0e0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; - jumbo-max-len = <10240>; - jumbo-supported; + #stream-id-cells = <1>; + iommus = <&smmu 0x877>; + power-domains = <&pd_eth3>; }; gpio: gpio@ff0a0000 { @@ -359,27 +630,39 @@ #gpio-cells = <0x2>; interrupt-parent = <&gic>; interrupts = <0 16 4>; - reg = <0x0 0xff0a0000 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0xff0a0000 0x0 0x1000>; + power-domains = <&pd_gpio>; }; i2c0: i2c@ff020000 { - compatible = "cdns,i2c-r1p10"; + compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 17 4>; - reg = <0x0 0xff020000 0x1000>; + reg = <0x0 0xff020000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&pd_i2c0>; }; i2c1: i2c@ff030000 { - compatible = "cdns,i2c-r1p10"; + compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 18 4>; - reg = <0x0 0xff030000 0x1000>; + reg = <0x0 0xff030000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&pd_i2c1>; + }; + + ocm: memory-controller@ff960000 { + compatible = "xlnx,zynqmp-ocmc-1.0"; + reg = <0x0 0xff960000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 10 4>; }; pcie: pcie@fd0e0000 { @@ -388,18 +671,33 @@ #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; + msi-controller; device_type = "pci"; interrupt-parent = <&gic>; - interrupts = < 0 118 4>, - < 0 116 4>, - < 0 115 4>, /* MSI_1 [63...32] */ - < 0 114 4 >; /* MSI_0 [31...0] */ - interrupt-names = "misc", "intx", "msi_1", "msi_0"; - reg = <0x0 0xfd0e0000 0x1000>, - <0x0 0xfd480000 0x1000>, - <0x0 0xe0000000 0x1000000>; + interrupts = <0 118 4>, + <0 117 4>, + <0 116 4>, + <0 115 4>, /* MSI_1 [63...32] */ + <0 114 4>; /* MSI_0 [31...0] */ + interrupt-names = "misc","dummy","intx", "msi1", "msi0"; + msi-parent = <&pcie>; + reg = <0x0 0xfd0e0000 0x0 0x1000>, + <0x0 0xfd480000 0x0 0x1000>, + <0x80 0x00000000 0x0 0x1000000>; reg-names = "breg", "pcireg", "cfg"; - ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>; + ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */ + 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, + <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, + <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, + <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; + power-domains = <&pd_pcie>; + pcie_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; }; qspi: spi@ff0f0000 { @@ -409,56 +707,121 @@ interrupts = <0 15 4>; interrupt-parent = <&gic>; num-cs = <1>; - reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>; + reg = <0x0 0xff0f0000 0x0 0x1000>, + <0x0 0xc0000000 0x0 0x8000000>; #address-cells = <1>; #size-cells = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x873>; + power-domains = <&pd_qspi>; }; rtc: rtc@ffa60000 { compatible = "xlnx,zynqmp-rtc"; status = "disabled"; - reg = <0x0 0xffa60000 0x100>; + reg = <0x0 0xffa60000 0x0 0x100>; interrupt-parent = <&gic>; interrupts = <0 26 4>, <0 27 4>; interrupt-names = "alarm", "sec"; }; + serdes: zynqmp_phy@fd400000 { + compatible = "xlnx,zynqmp-psgtr"; + status = "disabled"; + reg = <0x0 0xfd400000 0x0 0x40000>, + <0x0 0xfd3d0000 0x0 0x1000>, + <0x0 0xfd1a0000 0x0 0x1000>, + <0x0 0xff5e0000 0x0 0x1000>; + reg-names = "serdes", "siou", "fpd", "lpd"; + xlnx,tx_termination_fix; + lane0: lane0 { + #phy-cells = <4>; + }; + lane1: lane1 { + #phy-cells = <4>; + }; + lane2: lane2 { + #phy-cells = <4>; + }; + lane3: lane3 { + #phy-cells = <4>; + }; + }; + sata: ahci@fd0c0000 { compatible = "ceva,ahci-1v84"; status = "disabled"; - reg = <0x0 0xfd0c0000 0x2000>; + reg = <0x0 0xfd0c0000 0x0 0x2000>; interrupt-parent = <&gic>; interrupts = <0 133 4>; + power-domains = <&pd_sata>; }; sdhci0: sdhci@ff160000 { - compatible = "arasan,sdhci-8.9a"; + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 48 4>; - reg = <0x0 0xff160000 0x1000>; + reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x870>; + power-domains = <&pd_sd0>; }; sdhci1: sdhci@ff170000 { - compatible = "arasan,sdhci-8.9a"; + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 49 4>; - reg = <0x0 0xff170000 0x1000>; + reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <1>; + #stream-id-cells = <1>; + iommus = <&smmu 0x871>; + power-domains = <&pd_sd1>; }; smmu: smmu@fd800000 { compatible = "arm,mmu-500"; - reg = <0x0 0xfd800000 0x20000>; + reg = <0x0 0xfd800000 0x0 0x20000>; + #iommu-cells = <1>; #global-interrupts = <1>; interrupt-parent = <&gic>; - interrupts = <0 157 4>, - <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>, - <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>, - <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>, - <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>; + interrupts = <0 155 4>, + <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, + <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, + <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, + <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>; + mmu-masters = < &gem0 0x874 + &gem1 0x875 + &gem2 0x876 + &gem3 0x877 + &usb0 0x860 + &usb1 0x861 + &qspi 0x873 + &lpd_dma_chan1 0x868 + &lpd_dma_chan2 0x869 + &lpd_dma_chan3 0x86a + &lpd_dma_chan4 0x86b + &lpd_dma_chan5 0x86c + &lpd_dma_chan6 0x86d + &lpd_dma_chan7 0x86e + &lpd_dma_chan8 0x86f + &fpd_dma_chan1 0x14e8 + &fpd_dma_chan2 0x14e9 + &fpd_dma_chan3 0x14ea + &fpd_dma_chan4 0x14eb + &fpd_dma_chan5 0x14ec + &fpd_dma_chan6 0x14ed + &fpd_dma_chan7 0x14ee + &fpd_dma_chan8 0x14ef + &sdhci0 0x870 + &sdhci1 0x871 + &nand0 0x872>; }; spi0: spi@ff040000 { @@ -466,10 +829,11 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 19 4>; - reg = <0x0 0xff040000 0x1000>; + reg = <0x0 0xff040000 0x0 0x1000>; clock-names = "ref_clk", "pclk"; #address-cells = <1>; #size-cells = <0>; + power-domains = <&pd_spi0>; }; spi1: spi@ff050000 { @@ -477,10 +841,11 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 20 4>; - reg = <0x0 0xff050000 0x1000>; + reg = <0x0 0xff050000 0x0 0x1000>; clock-names = "ref_clk", "pclk"; #address-cells = <1>; #size-cells = <0>; + power-domains = <&pd_spi1>; }; ttc0: timer@ff110000 { @@ -488,8 +853,9 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 36 4>, <0 37 4>, <0 38 4>; - reg = <0x0 0xff110000 0x1000>; + reg = <0x0 0xff110000 0x0 0x1000>; timer-width = <32>; + power-domains = <&pd_ttc0>; }; ttc1: timer@ff120000 { @@ -497,8 +863,9 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 39 4>, <0 40 4>, <0 41 4>; - reg = <0x0 0xff120000 0x1000>; + reg = <0x0 0xff120000 0x0 0x1000>; timer-width = <32>; + power-domains = <&pd_ttc1>; }; ttc2: timer@ff130000 { @@ -506,8 +873,9 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 42 4>, <0 43 4>, <0 44 4>; - reg = <0x0 0xff130000 0x1000>; + reg = <0x0 0xff130000 0x0 0x1000>; timer-width = <32>; + power-domains = <&pd_ttc2>; }; ttc3: timer@ff140000 { @@ -515,52 +883,85 @@ status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 45 4>, <0 46 4>, <0 47 4>; - reg = <0x0 0xff140000 0x1000>; + reg = <0x0 0xff140000 0x0 0x1000>; timer-width = <32>; + power-domains = <&pd_ttc3>; }; uart0: serial@ff000000 { - compatible = "cdns,uart-r1p8"; + u-boot,dm-pre-reloc; + compatible = "cdns,uart-r1p12", "xlnx,xuartps"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 21 4>; - reg = <0x0 0xff000000 0x1000>; + reg = <0x0 0xff000000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; + power-domains = <&pd_uart0>; }; uart1: serial@ff010000 { - compatible = "cdns,uart-r1p8"; + u-boot,dm-pre-reloc; + compatible = "cdns,uart-r1p12", "xlnx,xuartps"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 22 4>; - reg = <0x0 0xff010000 0x1000>; + reg = <0x0 0xff010000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; + power-domains = <&pd_uart1>; }; - usb0: usb@fe200000 { - compatible = "snps,dwc3"; + usb0: usb0 { + #address-cells = <2>; + #size-cells = <2>; status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 65 4>; - reg = <0x0 0xfe200000 0x40000>; - clock-names = "clk_xin", "clk_ahb"; + compatible = "xlnx,zynqmp-dwc3"; + clock-names = "bus_clk", "ref_clk"; + clocks = <&clk125>, <&clk125>; + #stream-id-cells = <1>; + iommus = <&smmu 0x860>; + power-domains = <&pd_usb0>; + ranges; + + dwc3_0: dwc3@fe200000 { + compatible = "snps,dwc3"; + status = "disabled"; + reg = <0x0 0xfe200000 0x0 0x40000>; + interrupt-parent = <&gic>; + interrupts = <0 65 4>; + /* snps,quirk-frame-length-adjustment = <0x20>; */ + snps,refclk_fladj; + }; }; - usb1: usb@fe300000 { - compatible = "snps,dwc3"; + usb1: usb1 { + #address-cells = <2>; + #size-cells = <2>; status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 70 4>; - reg = <0x0 0xfe300000 0x40000>; - clock-names = "clk_xin", "clk_ahb"; + compatible = "xlnx,zynqmp-dwc3"; + clock-names = "bus_clk", "ref_clk"; + clocks = <&clk125>, <&clk125>; + #stream-id-cells = <1>; + iommus = <&smmu 0x861>; + power-domains = <&pd_usb1>; + ranges; + + dwc3_1: dwc3@fe300000 { + compatible = "snps,dwc3"; + status = "disabled"; + reg = <0x0 0xfe300000 0x0 0x40000>; + interrupt-parent = <&gic>; + interrupts = <0 70 4>; + /* snps,quirk-frame-length-adjustment = <0x20>; */ + snps,refclk_fladj; + }; }; watchdog0: watchdog@fd4d0000 { compatible = "cdns,wdt-r1p2"; status = "disabled"; interrupt-parent = <&gic>; - interrupts = <0 52 1>; - reg = <0x0 0xfd4d0000 0x1000>; + interrupts = <0 113 1>; + reg = <0x0 0xfd4d0000 0x0 0x1000>; timeout-sec = <10>; }; @@ -574,19 +975,21 @@ xlnx,pixel-format = "rgb565"; plane0 { dmas = <&xlnx_dpdma 3>; - dma-names = "dma"; + dma-names = "dma0"; }; plane1 { - dmas = <&xlnx_dpdma 0>; - dma-names = "dma"; + dmas = <&xlnx_dpdma 0>, + <&xlnx_dpdma 1>, + <&xlnx_dpdma 2>; + dma-names = "dma0", "dma1", "dma2"; }; }; }; - xlnx_dp: dp@43c00000 { + xlnx_dp: dp@fd4a0000 { compatible = "xlnx,v-dp"; status = "disabled"; - reg = <0x0 0xfd4a0000 0x1000>; + reg = <0x0 0xfd4a0000 0x0 0x1000>; interrupts = <0 119 4>; interrupt-parent = <&gic>; clock-names = "aclk", "aud_clk"; @@ -599,6 +1002,7 @@ xlnx,bpc = <8>; xlnx,audio-chan = <2>; xlnx,dp-sub = <&xlnx_dp_sub>; + xlnx,max-pclock-frequency = <300000>; }; xlnx_dp_snd_card: dp_snd_card { @@ -628,39 +1032,43 @@ dma-names = "tx"; }; - xlnx_dp_sub: dp_sub@43c0a000 { + xlnx_dp_sub: dp_sub@fd4aa000 { compatible = "xlnx,dp-sub"; status = "disabled"; - reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>; + reg = <0x0 0xfd4aa000 0x0 0x1000>, + <0x0 0xfd4ab000 0x0 0x1000>, + <0x0 0xfd4ac000 0x0 0x1000>; reg-names = "blend", "av_buf", "aud"; xlnx,output-fmt = "rgb"; + xlnx,vid-fmt = "yuyv"; + xlnx,gfx-fmt = "rgb565"; }; xlnx_dpdma: dma@fd4c0000 { compatible = "xlnx,dpdma"; status = "disabled"; - reg = <0x0 0xfd4c0000 0x1000>; + reg = <0x0 0xfd4c0000 0x0 0x1000>; interrupts = <0 122 4>; interrupt-parent = <&gic>; clock-names = "axi_clk"; dma-channels = <6>; #dma-cells = <1>; - dma-video0channel@43c10000 { + dma-video0channel { compatible = "xlnx,video0"; }; - dma-video1channel@43c10000 { + dma-video1channel { compatible = "xlnx,video1"; }; - dma-video2channel@43c10000 { + dma-video2channel { compatible = "xlnx,video2"; }; - dma-graphicschannel@43c10000 { + dma-graphicschannel { compatible = "xlnx,graphics"; }; - dma-audio0channel@43c10000 { + dma-audio0channel { compatible = "xlnx,audio0"; }; - dma-audio1channel@43c10000 { + dma-audio1channel { compatible = "xlnx,audio1"; }; };