X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fzynqmp-zcu102-revA.dts;h=6e22871713139517ad5f7f1d2e659690233bd946;hb=33ca4096845a57bd7a202a3ddc149917f15f8ecc;hp=df916d0f77d5c4125b9e43daf901c39887211c35;hpb=f811eca9db05fc89fe52141b256231ff94859add;p=oweals%2Fu-boot.git diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index df916d0f77..6e22871713 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -1,18 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP ZCU102 RevA * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek - * - * SPDX-License-Identifier: GPL-2.0+ */ /dts-v1/; #include "zynqmp.dtsi" -#include "zynqmp-clk.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include #include +#include / { model = "ZynqMP ZCU102 RevA"; @@ -35,6 +36,7 @@ chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; memory@0 { @@ -44,13 +46,11 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; autorepeat; sw19 { label = "sw19"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; - linux,code = <108>; /* down */ + linux,code = ; gpio-key,wakeup; autorepeat; }; @@ -74,19 +74,12 @@ status = "okay"; }; -/* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; - xlnx,include-sg; /* for testing purpose */ - xlnx,overfetch; /* for testing purpose */ - xlnx,ratectrl = <0>; /* for testing purpose */ - xlnx,src-issue = <31>; }; &fpd_dma_chan2 { status = "okay"; - xlnx,ratectrl = <100>; /* for testing purpose */ - xlnx,src-issue = <4>; /* for testing purpose */ }; &fpd_dma_chan3 { @@ -95,7 +88,6 @@ &fpd_dma_chan4 { status = "okay"; - xlnx,include-sg; /* for testing purpose */ }; &fpd_dma_chan5 { @@ -104,7 +96,6 @@ &fpd_dma_chan6 { status = "okay"; - xlnx,include-sg; /* for testing purpose */ }; &fpd_dma_chan7 { @@ -113,12 +104,10 @@ &fpd_dma_chan8 { status = "okay"; - xlnx,include-sg; /* for testing purpose */ }; &gem3 { status = "okay"; - local-mac-address = [00 0a 35 00 02 90]; phy-handle = <&phy0>; phy-mode = "rgmii-id"; phy0: phy@21 { @@ -142,12 +131,6 @@ clock-frequency = <400000>; tca6416_u97: gpio@20 { - /* - * Enable all GTs to out from U-Boot - * i2c mw 20 6 0 - setup IO to output - * i2c mw 20 2 ef - setup output values on pins 0-7 - * i2c mw 20 3 ff - setup output values on pins 10-17 - */ compatible = "ti,tca6416"; reg = <0x20>; gpio-controller; @@ -191,7 +174,7 @@ }; }; - tca6416_u61: gpio@21 { /* FIXME enable it by i2c mw 21 6 0 */ + tca6416_u61: gpio@21 { compatible = "ti,tca6416"; reg = <0x21>; gpio-controller; @@ -217,12 +200,12 @@ */ }; - i2cswitch@75 { /* u60 */ + i2c-mux@75 { /* u60 */ compatible = "nxp,pca9544"; #address-cells = <1>; #size-cells = <0>; reg = <0x75>; - i2c@0 { /* i2c mw 75 0 1 */ + i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; @@ -278,7 +261,7 @@ shunt-resistor = <5000>; }; }; - i2c@1 { /* i2c mw 75 0 1 */ + i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; @@ -324,91 +307,84 @@ shunt-resistor = <5000>; }; }; - i2c@2 { /* i2c mw 75 0 1 */ + i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; /* MAXIM_PMBUS - 00 */ max15301@a { /* u46 */ - compatible = "max15301"; + compatible = "maxim,max15301"; reg = <0xa>; }; max15303@b { /* u4 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0xb>; }; max15303@10 { /* u13 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x10>; }; max15301@13 { /* u47 */ - compatible = "max15301"; + compatible = "maxim,max15301"; reg = <0x13>; }; max15303@14 { /* u7 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x14>; }; max15303@15 { /* u6 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x15>; }; max15303@16 { /* u10 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x16>; }; max15303@17 { /* u9 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x17>; }; max15301@18 { /* u63 */ - compatible = "max15301"; + compatible = "maxim,max15301"; reg = <0x18>; }; max15303@1a { /* u49 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x1a>; }; max15303@1d { /* u18 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x1d>; }; max15303@20 { /* u8 */ - compatible = "max15303"; + compatible = "maxim,max15303"; status = "disabled"; /* unreachable */ reg = <0x20>; }; - -/* drivers/hwmon/pmbus/Kconfig:86: be called max20751. -drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o -*/ - max20751@72 { /* u95 FIXME - not detected */ - compatible = "max20751"; + max20751@72 { /* u95 */ + compatible = "maxim,max20751"; reg = <0x72>; }; - max20751@73 { /* u96 FIXME - not detected */ - compatible = "max20751"; + max20751@73 { /* u96 */ + compatible = "maxim,max20751"; reg = <0x73>; }; }; /* Bus 3 is not connected */ }; - - /* FIXME PMOD - j160 */ - /* FIXME MSP430F - u41 - not detected */ }; &i2c1 { status = "okay"; clock-frequency = <400000>; - /* FIXME PL i2c via PCA9306 - u45 */ - /* FIXME MSP430 - u41 - not detected */ - i2cswitch@74 { /* u34 */ + + /* PL i2c via PCA9306 - u45 */ + i2c-mux@74 { /* u34 */ compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; reg = <0x74>; - i2c@0 { /* i2c mw 74 0 1 */ + i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; @@ -420,60 +396,67 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o * 512B - 768B address 0x56 * 768B - 1024B address 0x57 */ - eeprom@54 { /* u23 */ - compatible = "at,24c08"; + eeprom: eeprom@54 { /* u23 */ + compatible = "atmel,24c08"; reg = <0x54>; }; }; - i2c@1 { /* i2c mw 74 0 2 */ + i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; - si5341: clock-generator1@36 { /* SI5341 - u69 */ - compatible = "si5341"; + si5341: clock-generator@36 { /* SI5341 - u69 */ + compatible = "silabs,si5341"; reg = <0x36>; }; }; - i2c@2 { /* i2c mw 74 0 4 */ + i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; - si570_1: clock-generator2@5d { /* USER SI570 - u42 */ + si570_1: clock-generator@5d { /* USER SI570 - u42 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x5d>; temperature-stability = <50>; factory-fout = <300000000>; clock-frequency = <300000000>; + clock-output-names = "si570_user"; }; }; - i2c@3 { /* i2c mw 74 0 8 */ + i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; - si570_2: clock-generator3@5d { /* USER MGT SI570 - u56 */ + si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x5d>; temperature-stability = <50>; /* copy from zc702 */ factory-fout = <156250000>; clock-frequency = <148500000>; + clock-output-names = "si570_mgt"; }; }; - i2c@4 { /* i2c mw 74 0 10 */ + i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <4>; - si5328: clock-generator4@69 {/* SI5328 - u20 */ + si5328: clock-generator@69 {/* SI5328 - u20 */ compatible = "silabs,si5328"; reg = <0x69>; + /* + * Chip has interrupt present connected to PL + * interrupt-parent = <&>; + * interrupts = <>; + */ }; }; /* 5 - 7 unconnected */ }; - i2cswitch@75 { + i2c-mux@75 { compatible = "nxp,pca9548"; /* u135 */ #address-cells = <1>; #size-cells = <0>; @@ -497,31 +480,11 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o reg = <2>; /* SYSMON */ }; - i2c@3 { /* i2c mw 75 0 8 */ + i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; /* DDR4 SODIMM */ - dev@19 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x19>; - }; - dev@30 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x30>; - }; - dev@35 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x35>; - }; - dev@36 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x36>; - }; - dev@51 { /* u-boot detection - maybe SPD */ - compatible = "xxx"; - reg = <0x51>; - }; }; i2c@4 { #address-cells = <1>; @@ -558,7 +521,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o status = "okay"; is-dual = <1>; flash@0 { - compatible = "m25p80"; /* 32MB */ + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; @@ -599,6 +562,8 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>; }; /* SD1 with level shifter */ @@ -608,6 +573,10 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o xlnx,mio_bank = <1>; }; +&serdes { + status = "okay"; +}; + &uart0 { status = "okay"; }; @@ -624,6 +593,26 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o &dwc3_0 { status = "okay"; dr_mode = "host"; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>; + maximum-speed = "super-speed"; +}; + +&watchdog0 { + status = "okay"; +}; + +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; }; &xilinx_drm {