X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Funiphier-ph1-sld8.dtsi;h=d9f61c2231968621bc0b407c91b47ca3ed5bcdd7;hb=0d3f732fd2ba679b4498541f075d1b1bdbea3935;hp=2f895e91dbc5a420a2211031826d941b309a82f7;hpb=509eb67802d5cdc2b2789f08ac9f2ba33d796872;p=oweals%2Fu-boot.git

diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 2f895e91db..d9f61c2231 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -1,8 +1,9 @@
 /*
  * Device Tree Source for UniPhier PH1-sLD8 SoC
  *
- * Copyright (C) 2014 Panasonic Corporation
- *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2014-2015 Panasonic Corporation
+ * Copyright (C) 2015      Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -10,11 +11,11 @@
 /include/ "skeleton.dtsi"
 
 / {
-	compatible = "panasonic,ph1-sld8";
+	compatible = "socionext,ph1-sld8";
 
 	cpus {
-		#size-cells = <0>;
 		#address-cells = <1>;
+		#size-cells = <0>;
 
 		cpu@0 {
 			device_type = "cpu";
@@ -28,5 +29,93 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
+
+		uart0: serial@54006800 {
+			compatible = "socionext,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006800 0x20>;
+			clock-frequency = <80000000>;
+		};
+
+		uart1: serial@54006900 {
+			compatible = "socionext,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006900 0x20>;
+			clock-frequency = <80000000>;
+		};
+
+		uart2: serial@54006a00 {
+			compatible = "socionext,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006a00 0x20>;
+			clock-frequency = <80000000>;
+		};
+
+		uart3: serial@54006b00 {
+			compatible = "socionext,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006b00 0x20>;
+			clock-frequency = <80000000>;
+		};
+
+		i2c0: i2c@58400000 {
+			compatible = "socionext,uniphier-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58400000 0x40>;
+			clock-frequency = <100000>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@58480000 {
+			compatible = "socionext,uniphier-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58480000 0x40>;
+			clock-frequency = <100000>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@58500000 {
+			compatible = "socionext,uniphier-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58500000 0x40>;
+			clock-frequency = <100000>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@58580000 {
+			compatible = "socionext,uniphier-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58580000 0x40>;
+			clock-frequency = <100000>;
+			status = "disabled";
+		};
+
+		usb0: usb@5a800100 {
+			compatible = "socionext,uniphier-ehci", "generic-ehci";
+			status = "disabled";
+			reg = <0x5a800100 0x100>;
+		};
+
+		usb1: usb@5a810100 {
+			compatible = "socionext,uniphier-ehci", "generic-ehci";
+			status = "disabled";
+			reg = <0x5a810100 0x100>;
+		};
+
+		usb2: usb@5a820100 {
+			compatible = "socionext,uniphier-ehci", "generic-ehci";
+			status = "disabled";
+			reg = <0x5a820100 0x100>;
+		};
+
+		nand: nand@68000000 {
+			compatible = "denali,denali-nand-dt";
+			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+			reg-names = "nand_data", "denali_reg";
+		};
 	};
 };