X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fsocfpga_cyclone5_is1.dts;h=a769498791ab5841e17f0434c816eae85d8f21a3;hb=d22c8be964a870f59d2fdab6c67cefa0c4799364;hp=16a32837102731ca8270017a468cde237dc8e9f1;hpb=35546f6f2014282cc4f9772324b5588bd44a2938;p=oweals%2Fu-boot.git diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts index 16a3283710..a769498791 100644 --- a/arch/arm/dts/socfpga_cyclone5_is1.dts +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts @@ -1,10 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2012 Altera Corporation - * - * SPDX-License-Identifier: GPL-2.0+ */ #include "socfpga_cyclone5.dtsi" +#include "socfpga-common-u-boot.dtsi" / { model = "SoCFPGA Cyclone V IS1"; @@ -12,6 +12,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; memory { @@ -31,10 +32,6 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - - soc { - u-boot,dm-pre-reloc; - }; }; &gmac1 { @@ -46,15 +43,19 @@ rxd2-skew-ps = <0>; rxd3-skew-ps = <0>; txen-skew-ps = <0>; - txc-skew-ps = <2600>; + txc-skew-ps = <1560>; rxdv-skew-ps = <0>; - rxc-skew-ps = <2000>; + rxc-skew-ps = <1200>; }; &gpio1 { status = "okay"; }; +&porta { + bank-name = "porta"; +}; + &i2c0 { status = "okay"; @@ -87,20 +88,27 @@ u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00"; + compatible = "n25q00", "jedec,spi-nor"; reg = <0>; /* chip select */ spi-max-frequency = <100000000>; m25p,fast-read; page-size = <256>; block-size = <16>; /* 2^16, 64KB */ - read-delay = <4>; /* delay value in read data capture register */ - tshsl-ns = <50>; - tsd2d-ns = <50>; - tchsh-ns = <4>; - tslch-ns = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; }; }; &usb1 { status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&watchdog0 { + status = "disabled"; +};