X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fsocfpga_cyclone5_is1.dts;h=a769498791ab5841e17f0434c816eae85d8f21a3;hb=42f15397275c6341abbdbb7a2d1188992274c5bb;hp=2e2b71fefb6c4771b0f4b98741f9eb4e2e541e74;hpb=fc04bd84b34e049286bcfc6791e9bb29123ec1ea;p=oweals%2Fu-boot.git

diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts
index 2e2b71fefb..a769498791 100644
--- a/arch/arm/dts/socfpga_cyclone5_is1.dts
+++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
@@ -1,10 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  *  Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include "socfpga_cyclone5.dtsi"
+#include "socfpga-common-u-boot.dtsi"
 
 / {
 	model = "SoCFPGA Cyclone V IS1";
@@ -12,6 +12,7 @@
 
 	chosen {
 		bootargs = "console=ttyS0,115200";
+		stdout-path = "serial0:115200n8";
 	};
 
 	memory {
@@ -31,10 +32,6 @@
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 	};
-
-	soc {
-		u-boot,dm-pre-reloc;
-	};
 };
 
 &gmac1 {
@@ -46,15 +43,19 @@
 	rxd2-skew-ps = <0>;
 	rxd3-skew-ps = <0>;
 	txen-skew-ps = <0>;
-	txc-skew-ps = <2600>;
+	txc-skew-ps = <1560>;
 	rxdv-skew-ps = <0>;
-	rxc-skew-ps = <2000>;
+	rxc-skew-ps = <1200>;
 };
 
 &gpio1 {
 	status = "okay";
 };
 
+&porta {
+	bank-name = "porta";
+};
+
 &i2c0 {
 	status = "okay";
 
@@ -87,7 +88,7 @@
 		u-boot,dm-pre-reloc;
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "n25q00";
+		compatible = "n25q00", "jedec,spi-nor";
 		reg = <0>;      /* chip select */
 		spi-max-frequency = <100000000>;
 		m25p,fast-read;
@@ -103,3 +104,11 @@
 &usb1 {
 	status = "okay";
 };
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+};
+
+&watchdog0 {
+	status = "disabled";
+};