X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Fsocfpga_cyclone5_dbm_soc1.dts;h=6439daa525d9ec4a315fec9b3eaa96d3234380e4;hb=HEAD;hp=139a70f265a69cb63d0c4a3d943d66b01bff2ffc;hpb=b71d9e8b3805305ea4116733f515061710ad7081;p=oweals%2Fu-boot.git

diff --git a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
index 139a70f265..6439daa525 100644
--- a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
+++ b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
@@ -4,6 +4,7 @@
  */
 
 #include "socfpga_cyclone5.dtsi"
+#include "socfpga-common-u-boot.dtsi"
 
 / {
 	model = "Devboards.de DBM-SoC1";
@@ -24,10 +25,6 @@
 		device_type = "memory";
 		reg = <0x0 0x40000000>; /* 1GB */
 	};
-
-	soc {
-		u-boot,dm-pre-reloc;
-	};
 };
 
 &gmac1 {
@@ -47,9 +44,20 @@
 	status = "okay";
 };
 
+&porta {
+	bank-name = "porta";
+};
+
+&portb {
+	bank-name = "portb";
+};
+
+&portc {
+	bank-name = "portc";
+};
+
 &mmc0 {
 	status = "okay";
-	bus-width = <4>;
 	u-boot,dm-pre-reloc;
 };
 
@@ -61,3 +69,7 @@
 &uart0 {
 	u-boot,dm-pre-reloc;
 };
+
+&watchdog0 {
+	status = "disabled";
+};