X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fdts%2Ffsl-ls1088a.dtsi;h=bf303c6ad38b46f91fb9459cbe93285b4dcfafe2;hb=b480bcca805c350bf875f026ee816db502c88765;hp=b4a42cf5d0cda91b570b359d86303df8dba11088;hpb=e294ba0678359bc32085c1714329af37e33e8f16;p=oweals%2Fu-boot.git diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi index b4a42cf5d0..bf303c6ad3 100644 --- a/arch/arm/dts/fsl-ls1088a.dtsi +++ b/arch/arm/dts/fsl-ls1088a.dtsi @@ -1,9 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 /* * NXP ls1088a SOC common device tree source * * Copyright 2017 NXP - * - * SPDX-License-Identifier: GPL-2.0+ X11 */ / { @@ -35,6 +34,38 @@ <1 10 0x8>; /* Hypervisor PPI, active-low */ }; + i2c0: i2c@2000000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2000000 0x0 0x10000>; + interrupts = <0 34 4>; + }; + + i2c1: i2c@2010000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2010000 0x0 0x10000>; + interrupts = <0 34 4>; + }; + + i2c2: i2c@2020000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2020000 0x0 0x10000>; + interrupts = <0 35 4>; + }; + + i2c3: i2c@2030000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2030000 0x0 0x10000>; + interrupts = <0 35 4>; + }; + serial0: serial@21c0500 { device_type = "serial"; compatible = "fsl,ns16550", "ns16550a"; @@ -51,12 +82,6 @@ interrupts = <0 32 0x1>; /* edge triggered */ }; - fsl_mc: fsl-mc@80c000000 { - compatible = "fsl,qoriq-mc"; - reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ - <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ - }; - dspi: dspi@2100000 { compatible = "fsl,vf610-dspi"; #address-cells = <1>; @@ -67,7 +92,7 @@ }; qspi: quadspi@1550000 { - compatible = "fsl,vf610-qspi"; + compatible = "fsl,ls1088a-qspi"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x20c0000 0x0 0x10000>, @@ -75,6 +100,15 @@ reg-names = "QuadSPI", "QuadSPI-memory"; num-cs = <4>; }; + + esdhc: esdhc@2140000 { + compatible = "fsl,esdhc"; + reg = <0x0 0x2140000 0x0 0x10000>; + interrupts = <0 28 0x4>; /* Level high type */ + little-endian; + bus-width = <4>; + }; + ifc: ifc@1530000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x2240000 0x0 0x20000>; @@ -142,4 +176,115 @@ ranges = <0x81000000 0x0 0x00000000 0x30 0x00020000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; + + sata: sata@3200000 { + compatible = "fsl,ls1088a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */ + 0x7 0x100520 0x0 0x4>; /* ecc sata addr*/ + reg-names = "sata-base", "ecc-addr"; + interrupts = <0 133 4>; + status = "disabled"; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + fsl_mc: fsl-mc@80c000000 { + compatible = "fsl,qoriq-mc", "simple-mfd"; + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ + #address-cells = <3>; + #size-cells = <1>; + + /* + * Region type 0x0 - MC portals + * Region type 0x1 - QBMAN portals + */ + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>; + + dpmacs { + compatible = "simple-mfd"; + #address-cells = <1>; + #size-cells = <0>; + + dpmac1: dpmac@1 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x1>; + status = "disabled"; + }; + + dpmac2: dpmac@2 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x2>; + status = "disabled"; + }; + + dpmac3: dpmac@3 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x3>; + status = "disabled"; + }; + + dpmac4: dpmac@4 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x4>; + status = "disabled"; + }; + + dpmac5: dpmac@5 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x5>; + status = "disabled"; + }; + + dpmac6: dpmac@6 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x6>; + status = "disabled"; + }; + + dpmac7: dpmac@7 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x7>; + status = "disabled"; + }; + + dpmac8: dpmac@8 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x8>; + status = "disabled"; + }; + + dpmac9: dpmac@9 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x9>; + status = "disabled"; + }; + + dpmac10: dpmac@a { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0xa>; + status = "disabled"; + }; + }; + }; + + emdio1: mdio@8B96000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8B96000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + emdio2: mdio@8B97000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8B97000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; };