X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Fsa1100%2Fcpu.c;h=f81ebc9ba299530c19413506eb9248688b623356;hb=0b28f86545084939da96bafb61ad3278b2fa4fe1;hp=6651898de235925b824f09cc409d80505650f7ac;hpb=aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c;p=oweals%2Fu-boot.git diff --git a/arch/arm/cpu/sa1100/cpu.c b/arch/arm/cpu/sa1100/cpu.c index 6651898de2..f81ebc9ba2 100644 --- a/arch/arm/cpu/sa1100/cpu.c +++ b/arch/arm/cpu/sa1100/cpu.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH @@ -6,8 +7,6 @@ * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Alex Zuepke - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -17,10 +16,7 @@ #include #include #include - -#ifdef CONFIG_USE_IRQ -DECLARE_GLOBAL_DATA_PTR; -#endif +#include static void cache_flush(void); @@ -52,3 +48,16 @@ static void cache_flush (void) asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); } + +#define RST_BASE 0x90030000 +#define RSRR 0x00 +#define RCSR 0x04 + +__attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused))) +{ + /* repeat endlessly */ + while (1) { + writel(0, RST_BASE + RCSR); + writel(1, RST_BASE + RSRR); + } +}