X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farmv8%2Ffsl-layerscape%2Ffdt.c;h=1e7e46e88a06459ad5444c679e7d3e2ef00b8101;hb=deb287b561233a1a9718ec87360dfa2079144e60;hp=762a95b945c131adc5375fa601def93f109fa49f;hpb=7d67bb1daf2daae7bce49147494f8c45001e76b1;p=oweals%2Fu-boot.git diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 762a95b945..1e7e46e88a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -1,12 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014-2015 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ #include #include -#include +#include #include #include #ifdef CONFIG_FSL_LSCH3 @@ -26,6 +25,8 @@ #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT #include #endif +#include +#include int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) { @@ -42,6 +43,33 @@ void ft_fixup_cpu(void *blob) int addr_cells; u64 val, core_id; size_t *boot_code_size = &(__secondary_boot_code_size); + u32 mask = cpu_pos_mask(); + int off_prev = -1; + + off = fdt_path_offset(blob, "/cpus"); + if (off < 0) { + puts("couldn't find /cpus node\n"); + return; + } + + fdt_support_default_count_cells(blob, off, &addr_cells, NULL); + + off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type", + "cpu", 4); + while (off != -FDT_ERR_NOTFOUND) { + reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); + if (reg) { + core_id = fdt_read_number(reg, addr_cells); + if (!test_bit(id_to_core(core_id), &mask)) { + fdt_del_node(blob, off); + off = off_prev; + } + } + off_prev = off; + off = fdt_node_offset_by_prop_value(blob, off_prev, + "device_type", "cpu", 4); + } + #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \ defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI) int node; @@ -79,13 +107,13 @@ remove_psci_node: puts("couldn't find /cpus node\n"); return; } - of_bus_default_count_cells(blob, off, &addr_cells, NULL); + fdt_support_default_count_cells(blob, off, &addr_cells, NULL); off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); while (off != -FDT_ERR_NOTFOUND) { reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); if (reg) { - core_id = of_read_number(reg, addr_cells); + core_id = fdt_read_number(reg, addr_cells); if (core_id == 0 || (is_core_online(core_id))) { val = spin_tbl_addr; val += id_to_core(core_id) * @@ -107,7 +135,7 @@ remove_psci_node: fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code, *boot_code_size); -#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD) +#if CONFIG_IS_ENABLED(EFI_LOADER) efi_add_memory_map((uintptr_t)&secondary_boot_code, ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT, EFI_RESERVED_MEMORY_TYPE, false); @@ -145,7 +173,7 @@ static void fdt_fixup_gic(void *blob) val = gur_in32(&gur->svr); - if (SVR_SOC_VER(val) != SVR_LS1043A) { + if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) { align_64k = 1; } else if (SVR_REV(val) != REV1_0) { val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT); @@ -299,7 +327,7 @@ static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev) memcpy((char *)tmp, p, len); val = fdt32_to_cpu(tmp[0][6]); - if (rev > REV1_0) { + if (rev == REV1_0) { tmp[1][6] = cpu_to_fdt32(val + 1); tmp[2][6] = cpu_to_fdt32(val + 2); tmp[3][6] = cpu_to_fdt32(val + 3); @@ -327,7 +355,7 @@ static void fdt_fixup_msi(void *blob) rev = gur_in32(&gur->svr); - if (SVR_SOC_VER(rev) != SVR_LS1043A) + if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A))) return; rev = SVR_REV(rev); @@ -345,11 +373,64 @@ static void fdt_fixup_msi(void *blob) } #endif +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT +/* Remove JR node used by SEC firmware */ +void fdt_fixup_remove_jr(void *blob) +{ + int jr_node, addr_cells, len; + int crypto_node = fdt_path_offset(blob, "crypto"); + u64 jr_offset, used_jr; + fdt32_t *reg; + + used_jr = sec_firmware_used_jobring_offset(); + fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL); + + jr_node = fdt_node_offset_by_compatible(blob, crypto_node, + "fsl,sec-v4.0-job-ring"); + + while (jr_node != -FDT_ERR_NOTFOUND) { + reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len); + jr_offset = fdt_read_number(reg, addr_cells); + if (jr_offset == used_jr) { + fdt_del_node(blob, jr_node); + break; + } + jr_node = fdt_node_offset_by_compatible(blob, jr_node, + "fsl,sec-v4.0-job-ring"); + } +} +#endif + +#ifdef CONFIG_ARCH_LS1028A +static void fdt_disable_multimedia(void *blob, unsigned int svr) +{ + int off; + + if (IS_MULTIMEDIA_EN(svr)) + return; + + /* Disable eDP/LCD node */ + off = fdt_node_offset_by_compatible(blob, -1, "arm,mali-dp500"); + if (off != -FDT_ERR_NOTFOUND) + fdt_status_disabled(blob, off); + + /* Disable GPU node */ + off = fdt_node_offset_by_compatible(blob, -1, "fsl,ls1028a-gpu"); + if (off != -FDT_ERR_NOTFOUND) + fdt_status_disabled(blob, off); +} +#endif + +#ifdef CONFIG_PCIE_ECAM_GENERIC +__weak void fdt_fixup_ecam(void *blob) +{ +} +#endif + void ft_cpu_setup(void *blob, bd_t *bd) { -#ifdef CONFIG_FSL_LSCH2 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); - unsigned int svr = in_be32(&gur->svr); + unsigned int svr = gur_in32(&gur->svr); /* delete crypto node if not on an E-processor */ if (!IS_E_PROCESSOR(svr)) @@ -358,11 +439,15 @@ void ft_cpu_setup(void *blob, bd_t *bd) else { ccsr_sec_t __iomem *sec; +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT + fdt_fixup_remove_jr(blob); + fdt_fixup_kaslr(blob); +#endif + sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR; fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms)); } #endif -#endif #ifdef CONFIG_MP ft_fixup_cpu(blob); @@ -373,10 +458,10 @@ void ft_cpu_setup(void *blob, bd_t *bd) "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); #endif - do_fixup_by_compat_u32(blob, "fixed-clock", - "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency", + CONFIG_SYS_CLK_FREQ, 1); -#ifdef CONFIG_PCI +#if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4) ft_pci_setup(blob, bd); #endif @@ -384,10 +469,17 @@ void ft_cpu_setup(void *blob, bd_t *bd) fdt_fixup_esdhc(blob, bd); #endif +#ifdef CONFIG_SYS_DPAA_QBMAN + fdt_fixup_bportals(blob); + fdt_fixup_qportals(blob); + do_fixup_by_compat_u32(blob, "fsl,qman", + "clock-frequency", get_qman_freq(), 1); +#endif + #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_firmware(blob); #endif -#ifndef CONFIG_LS1012A +#ifndef CONFIG_ARCH_LS1012A fsl_fdt_disable_usb(blob); #endif #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN @@ -396,4 +488,10 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI fdt_fixup_msi(blob); #endif +#ifdef CONFIG_ARCH_LS1028A + fdt_disable_multimedia(blob, svr); +#endif +#ifdef CONFIG_PCIE_ECAM_GENERIC + fdt_fixup_ecam(blob); +#endif }