X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farmv8%2Fcache.S;h=d8462365006288d6820415ba66003f2f26fddf3b;hb=37ecd04fe3c64c43703e61182b571705a35928a5;hp=249799cd01973facb26ff65f73050beea8458325;hpb=284bb60ed6636df3794ba102dd4325a96f1206e9;p=oweals%2Fu-boot.git diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index 249799cd01..d846236500 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -9,7 +9,6 @@ #include #include -#include #include #include @@ -31,9 +30,7 @@ ENTRY(__asm_flush_dcache_level) add x2, x2, #4 /* x2 <- log2(cache line size) */ mov x3, #0x3ff and x3, x3, x6, lsr #3 /* x3 <- max number of #ways */ - add w4, w3, w3 - sub w4, w4, 1 /* round up log2(#ways + 1) */ - clz w5, w4 /* bit position of #ways */ + clz w5, w3 /* bit position of #ways */ mov x4, #0x7fff and x4, x4, x6, lsr #13 /* x4 <- max number of #sets */ /* x12 <- cache level << 1 */ @@ -96,7 +93,7 @@ skip: b.gt loop_level mov x0, #0 - msr csselr_el1, x0 /* resotre csselr_el1 */ + msr csselr_el1, x0 /* restore csselr_el1 */ dsb sy isb mov lr, x15 @@ -157,3 +154,9 @@ ENTRY(__asm_invalidate_icache_all) isb sy ret ENDPROC(__asm_invalidate_icache_all) + +ENTRY(__asm_flush_l3_cache) + mov x0, #0 /* return status as success */ + ret +ENDPROC(__asm_flush_l3_cache) + .weak __asm_flush_l3_cache