X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farm%2FKconfig;h=f58f8fb23594164d224800fd34184365eef7cb0e;hb=ecb76eff56a312f4a69fd9a8ac839db646256b00;hp=1b9d27e3d19504791736c4953af4c69a6fded33e;hpb=58c3e62040befff8a32a9fd157b0dcd23de194ec;p=oweals%2Fu-boot.git diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1b9d27e3d1..f58f8fb235 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -858,6 +858,7 @@ config ARCH_SUNXI select DM_GPIO select DM_KEYBOARD select DM_MMC if MMC + select DM_SCSI if SCSI select DM_SERIAL select DM_USB if DISTRO_DEFAULTS select OF_BOARD_SETUP @@ -1005,6 +1006,7 @@ config TARGET_LS2080A_EMU select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select FSL_DDR_SYNC_REFRESH help Support for Freescale LS2080A_EMU platform The LS2080A Development System (EMULATOR) is a pre silicon @@ -1031,6 +1033,7 @@ config TARGET_LS1088AQDS select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SD_BOOT help Support for NXP LS1088AQDS platform The LS1088A Development System (QDS) is a high-performance @@ -1047,6 +1050,8 @@ config TARGET_LS2080AQDS select SUPPORT_SPL imply SCSI imply SCSI_AHCI + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL help Support for Freescale LS2080AQDS platform The LS2080A Development System (QDS) is a high-performance @@ -1061,6 +1066,8 @@ config TARGET_LS2080ARDB select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL imply SCSI imply SCSI_AHCI help @@ -1096,6 +1103,19 @@ config TARGET_LX2160ARDB is a high-performance development platform that supports the QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. +config TARGET_LX2160AQDS + bool "Support lx2160aqds" + select ARCH_LX2160A + select ARCH_MISC_INIT + select ARM64 + select ARMV8_MULTIENTRY + select BOARD_LATE_INIT + help + Support for NXP LX2160AQDS platform. + The lx2160aqds (LX2160A QorIQ Development System (QDS) + is a high-performance development platform that supports the + QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. + config TARGET_HIKEY bool "Support HiKey 96boards Consumer Edition Platform" select ARM64 @@ -1192,6 +1212,7 @@ config TARGET_LS1088ARDB select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SD_BOOT help Support for NXP LS1088ARDB platform. The LS1088A Reference design board (RDB) is a high-performance @@ -1210,6 +1231,7 @@ config TARGET_LS1021AQDS select LS1_DEEP_SLEEP select SUPPORT_SPL select SYS_FSL_DDR + select FSL_DDR_INTERACTIVE imply SCSI config TARGET_LS1021ATWR @@ -1249,7 +1271,9 @@ config TARGET_LS1043AQDS select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SPL imply SCSI + imply SCSI_AHCI help Support for Freescale LS1043AQDS platform. @@ -1261,7 +1285,6 @@ config TARGET_LS1043ARDB select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL - imply SCSI help Support for Freescale LS1043ARDB platform. @@ -1274,6 +1297,9 @@ config TARGET_LS1046AQDS select BOARD_LATE_INIT select DM_SPI_FLASH if DM_SPI select SUPPORT_SPL + select FSL_DDR_BIST if !SPL + select FSL_DDR_INTERACTIVE if !SPL + select FSL_DDR_INTERACTIVE if !SPL imply SCSI help Support for Freescale LS1046AQDS platform. @@ -1291,6 +1317,8 @@ config TARGET_LS1046ARDB select DM_SPI_FLASH if DM_SPI select POWER_MC34VR500 select SUPPORT_SPL + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL imply SCSI help Support for Freescale LS1046ARDB platform. @@ -1377,11 +1405,15 @@ config ARCH_STM32MP select SYSRESET select SYS_THUMB_BUILD imply CMD_DM + imply CMD_POWEROFF + imply ENV_VARS_UBOOT_RUNTIME_CONFIG help Support for STM32MP SoC family developed by STMicroelectronics, MPUs based on ARM cortex A core - U-BOOT is running in DDR and SPL support is the unsecure First Stage - BootLoader (FSBL) + U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL). + FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot + chain. + SPL is the unsecure FSBL for the basic boot chain. config ARCH_ROCKCHIP bool "Support Rockchip SoCs" @@ -1438,6 +1470,21 @@ config TI_SECURE_DEVICE authenticated) and the code. See the doc/README.ti-secure file for further details. +if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE +config ISW_ENTRY_ADDR + hex "Address in memory or XIP address of bootloader entry point" + default 0x402F4000 if AM43XX + default 0x402F0400 if AM33XX + default 0x40301350 if OMAP54XX + help + After any reset, the boot ROM searches the boot media for a valid + boot image. For non-XIP devices, the ROM then copies the image into + internal memory. For all boot modes, after the ROM processes the + boot image it eventually computes the entry point address depending + on the device type (secure/non-secure), boot media (xip/non-xip) and + image headers. +endif + source "arch/arm/mach-aspeed/Kconfig" source "arch/arm/mach-at91/Kconfig" @@ -1537,6 +1584,7 @@ source "arch/arm/cpu/armv8/Kconfig" source "arch/arm/mach-imx/Kconfig" source "board/bosch/shc/Kconfig" +source "board/bosch/guardian/Kconfig" source "board/CarMediaLab/flea3/Kconfig" source "board/Marvell/aspenite/Kconfig" source "board/Marvell/gplugd/Kconfig"