X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=arch%2Farc%2FKconfig;h=925e31201ef1486d23333b8b2c2b5ac8e4e3e796;hb=8a954eb695326eb406c4a548bb686190fea82bca;hp=a8dc4e2336da12aeef0c696be61267688492d925;hpb=a4fb5df214c7e8d5bc949c1068d92252f105427a;p=oweals%2Fu-boot.git

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index a8dc4e2336..925e31201e 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -4,34 +4,80 @@ menu "ARC architecture"
 config SYS_ARCH
 	default "arc"
 
-config USE_PRIVATE_LIBGCC
-	default y
-
 config SYS_CPU
-	default "arcv1"
+	default "arcv1" if ISA_ARCOMPACT
+	default "arcv2" if ISA_ARCV2
+
+choice
+	prompt "ARC Instruction Set"
+	default ISA_ARCOMPACT
+
+config ISA_ARCOMPACT
+	bool "ARCompact ISA"
+	help
+	  The original ARC ISA of ARC600/700 cores
+
+config ISA_ARCV2
+	bool "ARC ISA v2"
+	help
+	  ISA for the Next Generation ARC-HS cores
+
+endchoice
 
 choice
 	prompt "CPU selection"
-	default CPU_ARC770D
+	default CPU_ARC770D if ISA_ARCOMPACT
+	default CPU_ARCHS38 if ISA_ARCV2
 
 config CPU_ARC750D
 	bool "ARC 750D"
 	select ARC_MMU_V2
+	depends on ISA_ARCOMPACT
 	help
 	  Choose this option to build an U-Boot for ARC750D CPU.
 
 config CPU_ARC770D
 	bool "ARC 770D"
 	select ARC_MMU_V3
+	depends on ISA_ARCOMPACT
 	help
 	  Choose this option to build an U-Boot for ARC770D CPU.
 
+config CPU_ARCEM6
+	bool "ARC EM6"
+	select ARC_MMU_ABSENT
+	depends on ISA_ARCV2
+	help
+	  Next Generation ARC Core based on ISA-v2 ISA without MMU.
+
+config CPU_ARCHS36
+	bool "ARC HS36"
+	select ARC_MMU_ABSENT
+	depends on ISA_ARCV2
+	help
+	  Next Generation ARC Core based on ISA-v2 ISA without MMU.
+
+config CPU_ARCHS38
+	bool "ARC HS38"
+	select ARC_MMU_V4
+	depends on ISA_ARCV2
+	help
+	  Next Generation ARC Core based on ISA-v2 ISA with MMU.
+
 endchoice
 
 choice
 	prompt "MMU Version"
 	default ARC_MMU_V3 if CPU_ARC770D
 	default ARC_MMU_V2 if CPU_ARC750D
+	default ARC_MMU_ABSENT if CPU_ARCEM6
+	default ARC_MMU_ABSENT if CPU_ARCHS36
+	default ARC_MMU_V4 if CPU_ARCHS38
+
+config ARC_MMU_ABSENT
+	bool "No MMU"
+	help
+	  No MMU
 
 config ARC_MMU_V2
 	bool "MMU v2"
@@ -48,6 +94,12 @@ config ARC_MMU_V3
 	  Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
 	  Shared Address Spaces (SASID)
 
+config ARC_MMU_V4
+	bool "MMU v4"
+	depends on CPU_ARCHS38
+	help
+	  Introduced as a part of ARC HS38 release.
+
 endchoice
 
 config CPU_BIG_ENDIAN
@@ -68,7 +120,7 @@ config ARC_CACHE_LINE_SHIFT
 	int "Cache Line Length (as power of 2)"
 	range 5 7
 	default "6"
-	depends on !SYS_DCACHE_OFF || !SYS_DCACHE_OFF
+	depends on !SYS_DCACHE_OFF || !SYS_ICACHE_OFF
 	help
 	  Starting with ARC700 4.9, Cache line length is configurable,
 	  This option specifies "N", with Line-len = 2 power N
@@ -77,6 +129,7 @@ config ARC_CACHE_LINE_SHIFT
 
 choice
 	prompt "Target select"
+	optional
 
 config TARGET_TB100
 	bool "Support tb100"