X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=README;h=a13705ae7a846bc5d7f51a21e21f81c4fc87810e;hb=f1378cabc0d340393bc7e0312f5e1f70d5d19434;hp=c3fa549ea9c77a705f71321b5083423f8c9ff08d;hpb=325849ff3d4adeebb8f8f9bc5db950724df9bc21;p=oweals%2Fu-boot.git diff --git a/README b/README index c3fa549ea9..a13705ae7a 100644 --- a/README +++ b/README @@ -705,6 +705,7 @@ The following options need to be configured: CONFIG_ARM_ERRATA_454179 CONFIG_ARM_ERRATA_621766 CONFIG_ARM_ERRATA_798870 + CONFIG_ARM_ERRATA_801819 - Tegra SoC options: CONFIG_TEGRA_SUPPORT_NON_SECURE @@ -839,18 +840,6 @@ The following options need to be configured: define this to a list of base addresses for each (supported) port. See e.g. include/configs/versatile.h - CONFIG_PL011_SERIAL_RLCR - - Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500) - have separate receive and transmit line control registers. Set - this variable to initialize the extra register. - - CONFIG_PL011_SERIAL_FLUSH_ON_INIT - - On some platforms (e.g. U8500) U-Boot is loaded by a second stage - boot loader that has already initialized the UART. Define this - variable to flush the UART at init time. - CONFIG_SERIAL_HW_FLOW_CONTROL Define this variable to enable hw flow control in serial driver. @@ -1048,9 +1037,7 @@ The following options need to be configured: Monitor commands can be included or excluded from the build by using the #include files and #undef'ing unwanted - commands, or using - and augmenting with additional #define's - for wanted commands. + commands, or adding #define's for wanted commands. The default command configuration includes all commands except those marked below with a "*". @@ -1383,9 +1370,6 @@ The following options need to be configured: Management command for E1000 devices. When used on devices with SPI support you can reprogram the EEPROM from U-Boot. - CONFIG_E1000_FALLBACK_MAC - default MAC for empty EEPROM after production. - CONFIG_EEPRO100 Support for Intel 82557/82559/82559ER chips. Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM @@ -1498,12 +1482,6 @@ The following options need to be configured: Support for i2c bus TPM devices. Only one device per system is supported at this time. - CONFIG_TPM_TIS_I2C_BUS_NUMBER - Define the the i2c bus number for the TPM device - - CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS - Define the TPM's address on the i2c bus - CONFIG_TPM_TIS_I2C_BURST_LIMITATION Define the burst count bytes upper limit @@ -1673,7 +1651,7 @@ The following options need to be configured: key for the Replay Protection Memory Block partition in eMMC. - USB Device Firmware Update (DFU) class support: - CONFIG_DFU_FUNCTION + CONFIG_USB_FUNCTION_DFU This enables the USB portion of the DFU USB class CONFIG_CMD_DFU @@ -1718,6 +1696,9 @@ The following options need to be configured: sending again an USB request to the device. - USB Device Android Fastboot support: + CONFIG_USB_FUNCTION_FASTBOOT + This enables the USB part of the fastboot gadget + CONFIG_CMD_FASTBOOT This enables the command "fastboot" which enables the Android fastboot mode for the platform's USB device. Fastboot is a USB @@ -1729,12 +1710,12 @@ The following options need to be configured: This enables support for booting images which use the Android image format header. - CONFIG_USB_FASTBOOT_BUF_ADDR + CONFIG_FASTBOOT_BUF_ADDR The fastboot protocol requires a large memory buffer for downloads. Define this to the starting RAM address to use for downloaded images. - CONFIG_USB_FASTBOOT_BUF_SIZE + CONFIG_FASTBOOT_BUF_SIZE The fastboot protocol requires a large memory buffer for downloads. This buffer should be as large as possible for a platform. Define this to the size available RAM for fastboot. @@ -3081,11 +3062,6 @@ CBFS (Coreboot Filesystem) support Define this option to include a destructive SPI flash test ('sf test'). - CONFIG_SPI_FLASH_BAR Ban/Extended Addr Reg - - Define this option to use the Bank addr/Extended addr - support on SPI flashes which has size > 16Mbytes. - CONFIG_SF_DUAL_FLASH Dual flash memories Define this option to use dual flash support where two flash @@ -5070,6 +5046,33 @@ within that device. normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the virtual address in NOR flash. +Freescale Layerscape Debug Server Support: +------------------------------------------- +The Freescale Layerscape Debug Server Support supports the loading of +"Debug Server firmware" and triggering SP boot-rom. +This firmware often needs to be loaded during U-Boot booting. + +- CONFIG_FSL_DEBUG_SERVER + Enable the Debug Server for Layerscape SoCs. + +- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE + Define minimum DDR size required for debug server image + +- CONFIG_SYS_MEM_TOP_HIDE_MIN + Define minimum DDR size to be hided from top of the DDR memory + +Reproducible builds +------------------- + +In order to achieve reproducible builds, timestamps used in the U-Boot build +process have to be set to a fixed value. + +This is done using the SOURCE_DATE_EPOCH environment variable. +SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration +option for U-Boot or an environment variable in U-Boot. + +SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC. + Building the Software: ======================