X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=README;h=4819696deb64d0b34b1b3fac1337b456662733f7;hb=5b8e76c35ec312a3f73126bd1a2d2c0965b98a9f;hp=2d084b2cbbffc26f071a673316b050d7e7067076;hpb=d66a10fc00407fda3c5091ca38c090dc055f7953;p=oweals%2Fu-boot.git diff --git a/README b/README index 2d084b2cbb..4819696deb 100644 --- a/README +++ b/README @@ -292,7 +292,7 @@ board_init_r(): - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and CONFIG_SPL_STACK_R_ADDR points into SDRAM - preloader_console_init() can be called here - typically this is - done by defining CONFIG_SPL_BOARD_INIT and then supplying a + done by selecting CONFIG_SPL_BOARD_INIT and then supplying a spl_board_init() function containing this call - loads U-Boot or (in falcon mode) Linux @@ -328,34 +328,6 @@ The following options need to be configured: multiple fs option at one time for marvell soc family -- 8xx CPU Options: (if using an MPC8xx CPU) - CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if - get_gclk_freq() cannot work - e.g. if there is no 32KHz - reference PIT/RTC clock - CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK - or XTAL/EXTAL) - -- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU): - CONFIG_SYS_8xx_CPUCLK_MIN - CONFIG_SYS_8xx_CPUCLK_MAX - CONFIG_8xx_CPUCLK_DEFAULT - See doc/README.MPC866 - - CONFIG_SYS_MEASURE_CPUCLK - - Define this to measure the actual CPU clock instead - of relying on the correctness of the configured - values. Mostly useful for board bringup to make sure - the PLL is locked at the intended frequency. Note - that this requires a (stable) reference clock (32 kHz - RTC clock or CONFIG_SYS_8XX_XIN) - - CONFIG_SYS_DELAYED_ICACHE - - Define this option if you want to enable the - ICache only when Code runs from RAM. - - 85xx CPU Options: CONFIG_SYS_PPC64 @@ -723,26 +695,15 @@ The following options need to be configured: Define this variable to enable hw flow control in serial driver. Current user of this option is drivers/serial/nsl16550.c driver -- Console Interface: - Depending on board, define exactly one serial port - (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2, - CONFIG_8xx_CONS_SCC1, ...), or switch off the serial - console by defining CONFIG_8xx_CONS_NONE - - Note: if CONFIG_8xx_CONS_NONE is defined, the serial - port routines must be defined elsewhere - (i.e. serial_init(), serial_getc(), ...) - - Console Baudrate: CONFIG_BAUDRATE - in bps Select one of the baudrates listed in CONFIG_SYS_BAUDRATE_TABLE, see below. - CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale - Console Rx buffer length With CONFIG_SYS_SMC_RXBUFLEN it is possible to define the maximum receive buffer length for the SMC. - This option is actual only for 82xx and 8xx possible. + This option is actual only for 82xx possible. If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE must be defined, to setup the maximum idle timeout for the SMC. @@ -826,24 +787,12 @@ The following options need to be configured: CONFIG_CMD_BOOTD bootd CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support CONFIG_CMD_CACHE * icache, dcache - CONFIG_CMD_CLK * clock command support CONFIG_CMD_CONSOLE coninfo - CONFIG_CMD_CRC32 * crc32 - CONFIG_CMD_DATE * support for RTC, date/time... CONFIG_CMD_DHCP * DHCP support CONFIG_CMD_DIAG * Diagnostics - CONFIG_CMD_DS4510 * ds4510 I2C gpio commands - CONFIG_CMD_DS4510_INFO * ds4510 I2C info command - CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd - CONFIG_CMD_DS4510_RST * ds4510 I2C rst command - CONFIG_CMD_DTT * Digital Therm and Thermostat CONFIG_CMD_ECHO echo arguments CONFIG_CMD_EDITENV edit env variable - CONFIG_CMD_EEPROM * EEPROM read/write support - CONFIG_CMD_EEPROM_LAYOUT* EEPROM layout aware commands CONFIG_CMD_ELF * bootelf, bootvx - CONFIG_CMD_ENV_CALLBACK * display details about env callbacks - CONFIG_CMD_ENV_FLAGS * display details about env flags CONFIG_CMD_ENV_EXISTS * check existence of env variable CONFIG_CMD_EXPORTENV * export the environment CONFIG_CMD_EXT2 * ext2 command support @@ -852,28 +801,17 @@ The following options need to be configured: that work for multiple fs types CONFIG_CMD_FS_UUID * Look up a filesystem UUID CONFIG_CMD_SAVEENV saveenv - CONFIG_CMD_FDC * Floppy Disk Support - CONFIG_CMD_FAT * FAT command support CONFIG_CMD_FLASH flinfo, erase, protect CONFIG_CMD_FPGA FPGA device initialization support - CONFIG_CMD_FUSE * Device fuse support - CONFIG_CMD_GETTIME * Get time since boot CONFIG_CMD_GO * the 'go' command (exec code) CONFIG_CMD_GREPENV * search environment - CONFIG_CMD_HASH * calculate hash / digest CONFIG_CMD_I2C * I2C serial bus support - CONFIG_CMD_IDE * IDE harddisk support CONFIG_CMD_IMI iminfo CONFIG_CMD_IMLS List all images found in NOR flash CONFIG_CMD_IMLS_NAND * List all images found in NAND flash - CONFIG_CMD_IMMAP * IMMR dump support - CONFIG_CMD_IOTRACE * I/O tracing for debugging CONFIG_CMD_IMPORTENV * import an environment CONFIG_CMD_INI * import data from an ini file into the env - CONFIG_CMD_IRQ * irqinfo CONFIG_CMD_ITEST Integer/string test of 2 values - CONFIG_CMD_JFFS2 * JFFS2 Support - CONFIG_CMD_KGDB * kgdb CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader) CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration (169.254.*.*) @@ -910,8 +848,6 @@ The following options need to be configured: CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) CONFIG_CMD_SF * Read/write/erase SPI NOR flash - CONFIG_CMD_SHA1SUM * print sha1 memory digest - (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support @@ -937,7 +873,7 @@ The following options need to be configured: Note: Don't enable the "icache" and "dcache" commands (configuration option CONFIG_CMD_CACHE) unless you know what you (and your U-Boot users) are doing. Data - cache cannot be enabled on systems like the 8xx or + cache cannot be enabled on systems like the 8260 (where accesses to the IMMR region must be uncached), and it cannot be disabled on all other systems where we (mis-) use the data cache to hold an @@ -970,7 +906,7 @@ The following options need to be configured: tree is available in the global data as gd->fdt_blob. U-Boot needs to get its device tree from somewhere. This can - be done using one of the two options below: + be done using one of the three options below: CONFIG_OF_EMBED If this variable is defined, U-Boot will embed a device tree @@ -991,11 +927,17 @@ The following options need to be configured: still use the individual files if you need something more exotic. + CONFIG_OF_BOARD + If this variable is defined, U-Boot will use the device tree + provided by the board at runtime instead of embedding one with + the image. Only boards defining board_fdt_blob_setup() support + this option (see include/fdtdec.h file). + - Watchdog: CONFIG_WATCHDOG If this variable is defined, it enables watchdog support for the SoC. There must be support in the SoC - specific code for a watchdog. For the 8xx and 8260 + specific code for a watchdog. For the 8260 CPUs, the SIU Watchdog feature is enabled in the SYPCR register. When supported for a specific SoC is available, then no further board specific code should @@ -1023,7 +965,6 @@ The following options need to be configured: has to be selected, too. Define exactly one of the following options: - CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC CONFIG_RTC_MC146818 - use MC146818 RTC @@ -1034,7 +975,7 @@ The following options need to be configured: CONFIG_RTC_DS164x - use Dallas DS164x RTC CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC - CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 + CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 CONFIG_SYS_RV3029_TCR - enable trickle charger on RV3029 RTC. @@ -1083,15 +1024,13 @@ The following options need to be configured: - Partition Labels (disklabels) Supported: Zero or more of the following: CONFIG_MAC_PARTITION Apple's MacOS partition table. - CONFIG_DOS_PARTITION MS Dos partition table, traditional on the - Intel architecture, USB sticks, etc. CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc. CONFIG_EFI_PARTITION GPT partition table, common when EFI is the bootloader. Note 2TB partition limit; see disk/part_efi.c CONFIG_MTD_PARTITIONS Memory Technology Device partition table. - If IDE or SCSI support is enabled (CONFIG_CMD_IDE or + If IDE or SCSI support is enabled (CONFIG_IDE or CONFIG_SCSI) you must configure support for at least one non-MTD partition type as well. @@ -1366,11 +1305,6 @@ The following options need to be configured: Define this if you want stdin, stdout &/or stderr to be set to usbtty. - mpc8xx: - CONFIG_SYS_USB_EXTC_CLK 0xBLAH - Derive USB clock from external clock "blah" - - CONFIG_SYS_USB_EXTC_CLK 0x02 - If you have a USB-IF assigned VendorID then you may wish to define your own vendor specific values either in BoardName.h or directly in usbd_vendor_info.h. If you don't define @@ -1537,21 +1471,6 @@ The following options need to be configured: CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS Define these for a default partition on a NOR device -- FAT(File Allocation Table) filesystem write function support: - CONFIG_FAT_WRITE - - Define this to enable support for saving memory data as a - file in FAT formatted partition. - - This will also enable the command "fatwrite" enabling the - user to write files to FAT. - -- FAT(File Allocation Table) filesystem cluster size: - CONFIG_FS_FAT_MAX_CLUSTSIZE - - Define the max cluster size for fat operations else - a default value of 65536 will be defined. - - Keyboard Support: See Kconfig help for available keyboard drivers. @@ -1738,29 +1657,6 @@ The following options need to be configured: the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should be at least 4MB. - CONFIG_LZMA - - If this option is set, support for lzma compressed - images is included. - - Note: The LZMA algorithm adds between 2 and 4KB of code and it - requires an amount of dynamic memory that is given by the - formula: - - (1846 + 768 << (lc + lp)) * sizeof(uint16) - - Where lc and lp stand for, respectively, Literal context bits - and Literal pos bits. - - This value is upper-bounded by 14MB in the worst case. Anyway, - for a ~4MB large kernel image, we have lc=3 and lp=0 for a - total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is - a very small buffer. - - Use the lzmainfo tool to determinate the lc and lp values and - then calculate the amount of needed dynamic memory (ensuring - the appropriate CONFIG_SYS_MALLOC_LEN value). - CONFIG_LZO If this option is set, support for LZO compressed images @@ -2012,7 +1908,7 @@ The following options need to be configured: Defining CONFIG_CAN_DRIVER enables CAN driver support on those systems that support this (optional) - feature, like the TQM8xxL modules. + feature. - I2C Support: CONFIG_SYS_I2C @@ -2200,52 +2096,7 @@ The following options need to be configured: If you do not have i2c muxes on your board, omit this define. -- Legacy I2C Support: CONFIG_HARD_I2C - - NOTE: It is intended to move drivers to CONFIG_SYS_I2C which - provides the following compelling advantages: - - - more than one i2c adapter is usable - - approved multibus support - - better i2c mux support - - ** Please consider updating your I2C driver now. ** - - These enable legacy I2C serial bus commands. Defining - CONFIG_HARD_I2C will include the appropriate I2C driver - for the selected CPU. - - This will allow you to use i2c commands at the u-boot - command line (as long as you set CONFIG_CMD_I2C in - CONFIG_COMMANDS) and communicate with i2c based realtime - clock chips. See common/cmd_i2c.c for a description of the - command line interface. - - CONFIG_HARD_I2C selects a hardware I2C controller. - - There are several other quantities that must also be - defined when you define CONFIG_HARD_I2C. - - In both cases you will need to define CONFIG_SYS_I2C_SPEED - to be the frequency (in Hz) at which you wish your i2c bus - to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie - the CPU's i2c node address). - - Now, the u-boot i2c code for the mpc8xx - (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node - and so its address should therefore be cleared to 0 (See, - eg, MPC823e User's Manual p.16-473). So, set - CONFIG_SYS_I2C_SLAVE to 0. - - CONFIG_SYS_I2C_INIT_MPC5XXX - - When a board is reset during an i2c bus transfer - chips might think that the current transfer is still - in progress. Reset the slave devices by sending start - commands until the slave device responds. - - That's all that's required for CONFIG_HARD_I2C. - +- Legacy I2C Support: If you use the software i2c interface (CONFIG_SYS_I2C_SOFT) then the following macros need to be defined (examples are from include/configs/lwmon.h): @@ -2334,23 +2185,6 @@ The following options need to be configured: custom i2c_init_board() routine in boards/xxx/board.c is run early in the boot sequence. - CONFIG_SYS_I2C_BOARD_LATE_INIT - - An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is - defined a custom i2c_board_late_init() routine in - boards/xxx/board.c is run AFTER the operations in i2c_init() - is completed. This callpoint can be used to unreset i2c bus - using CPU i2c controller register accesses for CPUs whose i2c - controller provide such a method. It is called at the end of - i2c_init() to allow i2c_init operations to setup the i2c bus - controller on the CPU (e.g. setting bus speed & slave address). - - CONFIG_I2CFAST (PPC405GP|PPC405EP only) - - This option enables configuration of bi_iic_fast[] flags - in u-boot bd_info structure based on u-boot environment - variable "i2cfast". (see also i2cfast) - CONFIG_I2C_MULTI_BUS This option allows the use of multiple I2C buses, each of which @@ -2386,17 +2220,6 @@ The following options need to be configured: If defined, then this indicates the I2C bus number for the RTC. If not defined, then U-Boot assumes that RTC is on I2C bus 0. - CONFIG_SYS_DTT_BUS_NUM - - If defined, then this indicates the I2C bus number for the DTT. - If not defined, then U-Boot assumes that DTT is on I2C bus 0. - - CONFIG_SYS_I2C_DTT_ADDR: - - If defined, specifies the I2C address of the DTT device. - If not defined, then U-Boot uses predefined value for - specified DTT device. - CONFIG_SOFT_I2C_READ_REPEATED_START defining this will force the i2c_read() function in @@ -2463,19 +2286,6 @@ The following options need to be configured: Specify the number of FPGA devices to support. - CONFIG_CMD_FPGA_LOADMK - - Enable support for fpga loadmk command - - CONFIG_CMD_FPGA_LOADP - - Enable support for fpga loadp command - load partial bitstream - - CONFIG_CMD_FPGA_LOADBP - - Enable support for fpga loadbp command - load partial bitstream - (Xilinx only) - CONFIG_SYS_FPGA_PROG_FEEDBACK Enable printing of hash marks during FPGA configuration. @@ -2590,7 +2400,7 @@ The following options need to be configured: following board configurations are known to be "pRAM-clean": - IVMS8, IVML24, SPD8xx, TQM8xxL, + IVMS8, IVML24, SPD8xx, HERMES, IP860, RPXlite, LWMON, FLAGADM, TQM8260 @@ -2803,38 +2613,6 @@ The following options need to be configured: A better solution is to properly configure the firewall, but sometimes that is not allowed. -- Hashing support: - CONFIG_CMD_HASH - - This enables a generic 'hash' command which can produce - hashes / digests from a few algorithms (e.g. SHA1, SHA256). - - CONFIG_HASH_VERIFY - - Enable the hash verify command (hash -v). This adds to code - size a little. - - CONFIG_SHA1 - This option enables support of hashing using SHA1 - algorithm. The hash is calculated in software. - CONFIG_SHA256 - This option enables support of hashing using - SHA256 algorithm. The hash is calculated in software. - CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration - for SHA1/SHA256 hashing. - This affects the 'hash' command and also the - hash_lookup_algo() function. - CONFIG_SHA_PROG_HW_ACCEL - This option enables - hardware-acceleration for SHA1/SHA256 progressive hashing. - Data can be streamed in a block at a time and the hashing - is performed in hardware. - - Note: There is also a sha1sum command, which should perhaps - be deprecated in favour of 'hash sha1'. - -- Freescale i.MX specific commands: - CONFIG_CMD_HDMIDETECT - This enables 'hdmidet' command which returns true if an - HDMI monitor is detected. This command is i.MX 6 specific. - - bootcount support: CONFIG_BOOTCOUNT_LIMIT @@ -3031,15 +2809,6 @@ FIT uImage format: This define is introduced, as the legacy image format is enabled per default for backward compatibility. -- FIT image support: - CONFIG_FIT_DISABLE_SHA256 - Supporting SHA256 hashes has quite an impact on binary size. - For constrained systems sha256 hash support can be disabled - with this option. - - TODO(sjg@chromium.org): Adjust this option to be positive, - and move it to Kconfig - - Standalone program support: CONFIG_STANDALONE_LOAD_ADDR @@ -3704,11 +3473,6 @@ Configuration Settings: If defined, don't allow the -f switch to env set override variable access flags. -- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only) - This is set by OMAP boards for the max time that reset should - be asserted. See doc/README.omap-reset-time for details on how - the value can be calculated on a given board. - - CONFIG_USE_STDINT If stdint.h is available with your toolchain you can define this option to enable it. You can provide option 'USE_STDINT=1' when @@ -4043,7 +3807,7 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. environment. - CONFIG_FAT_WRITE: - This should be defined. Otherwise it cannot save the environment file. + This must be enabled. Otherwise it cannot save the environment file. - CONFIG_ENV_IS_IN_MMC: @@ -4239,7 +4003,7 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_IMMR: Physical address of the Internal Memory. DO NOT CHANGE unless you know exactly what you're - doing! (11-4) [MPC8xx/82xx systems only] + doing! (11-4) [82xx systems only] - CONFIG_SYS_INIT_RAM_ADDR: @@ -4252,7 +4016,7 @@ Low Level (hardware related) configuration options: sequences. U-Boot uses the following memory types: - - MPC8xx and MPC8260: IMMR (internal memory of the CPU) + - MPC8260: IMMR (internal memory of the CPU) - MPC824X: data cache - PPC4xx: data cache @@ -4310,19 +4074,7 @@ Low Level (hardware related) configuration options: Machine Mode Register and Memory Periodic Timer Prescaler definitions (SDRAM timing) -- CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]: - enable I2C microcode relocation patch (MPC8xx); - define relocation offset in DPRAM [DSP2] - -- CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]: - enable SMC microcode relocation patch (MPC8xx); - define relocation offset in DPRAM [SMC1] - -- CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]: - enable SPI microcode relocation patch (MPC8xx); - define relocation offset in DPRAM [SCC4] - -- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only) +- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8260 only) Offset of the bootmode word in DPRAM used by post (Power On Self Tests). This definition overrides #define'd default value in commproc.h resp. @@ -4416,21 +4168,6 @@ Low Level (hardware related) configuration options: Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. -- CONFIG_ETHER_ON_FEC[12] - Define to enable FEC[12] on a 8xx series processor. - -- CONFIG_FEC[12]_PHY - Define to the hardcoded PHY address which corresponds - to the given FEC; i. e. - #define CONFIG_FEC1_PHY 4 - means that the PHY with address 4 is connected to FEC1 - - When set to -1, means to probe for first available. - -- CONFIG_FEC[12]_PHY_NORXERR - The PHY does not have a RXERR line (RMII only). - (so program the FEC to ignore it). - - CONFIG_RMII Enable RMII mode for all FECs. Note that this is a global option, we can't @@ -4508,11 +4245,6 @@ Low Level (hardware related) configuration options: If defined, the x86 reset vector code is included. This is not needed when U-Boot is running from Coreboot. -- CONFIG_SYS_MPUCLK - Defines the MPU clock speed (in MHz). - - NOTE : currently only supported on AM335x platforms. - - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC: Enables the RTC32K OSC on AM33xx based plattforms