X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;f=README;h=1def1dedbe6fa7606faf961bd593b9c59aeb07ee;hb=2c0f79e44bfdc592913b96aeeb7ecc5acca6eb37;hp=f997a5d8605e91ff085da24eeaceac926cf9f194;hpb=e67f46286440a53fb1d693152667ea3b1a6b3060;p=oweals%2Fu-boot.git diff --git a/README b/README index f997a5d860..558f0111ff 100644 --- a/README +++ b/README @@ -1,5 +1,5 @@ # -# (C) Copyright 2000 - 2009 +# (C) Copyright 2000 - 2011 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -147,7 +147,7 @@ Directory Hierarchy: /cpu CPU specific files /arm720t Files specific to ARM 720 CPUs /arm920t Files specific to ARM 920 CPUs - /at91rm9200 Files specific to Atmel AT91RM9200 CPU + /at91 Files specific to Atmel AT91RM9200 CPU /imx Files specific to Freescale MC9328 i.MX CPUs /s3c24x0 Files specific to Samsung S3C24X0 CPUs /arm925t Files specific to ARM 925 CPUs @@ -164,7 +164,7 @@ Directory Hierarchy: /blackfin Files generic to Analog Devices Blackfin architecture /cpu CPU specific files /lib Architecture specific library files - /i386 Files generic to i386 architecture + /x86 Files generic to x86 architecture /cpu CPU specific files /lib Architecture specific library files /m68k Files generic to m68k architecture @@ -180,6 +180,12 @@ Directory Hierarchy: /lib Architecture specific library files /mips Files generic to MIPS architecture /cpu CPU specific files + /mips32 Files specific to MIPS32 CPUs + /xburst Files specific to Ingenic XBurst CPUs + /lib Architecture specific library files + /nds32 Files generic to NDS32 architecture + /cpu CPU specific files + /n1213 Files specific to Andes Technology N1213 CPUs /lib Architecture specific library files /nios2 Files generic to Altera NIOS2 architecture /cpu CPU specific files @@ -319,6 +325,11 @@ The following options need to be configured: CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR CONFIG_SYS_8272ADS - MPC8272ADS +- Marvell Family Member + CONFIG_SYS_MVFS - define it if you want to enable + multiple fs option at one time + for marvell soc family + - MPC824X Family Member (if CONFIG_MPC824X is defined) Define exactly one of CONFIG_MPC8240, CONFIG_MPC8245 @@ -351,6 +362,18 @@ The following options need to be configured: Define this option if you want to enable the ICache only when Code runs from RAM. +- 85xx CPU Options: + CONFIG_SYS_FSL_TBCLK_DIV + + Defines the core time base clock divider ratio compared to the + system clock. On most PQ3 devices this is 8, on newer QorIQ + devices it can be 16 or 32. The ratio varies from SoC to Soc. + + CONFIG_SYS_FSL_PCIE_COMPAT + + Defines the string to utilize when trying to match PCIe device + tree nodes for the given platform. + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO @@ -365,6 +388,38 @@ The following options need to be configured: 2. The core frequency as calculated above is multiplied by this value. +- MIPS CPU options: + CONFIG_SYS_INIT_SP_OFFSET + + Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack + pointer. This is needed for the temporary stack before + relocation. + + CONFIG_SYS_MIPS_CACHE_MODE + + Cache operation mode for the MIPS CPU. + See also arch/mips/include/asm/mipsregs.h. + Possible values are: + CONF_CM_CACHABLE_NO_WA + CONF_CM_CACHABLE_WA + CONF_CM_UNCACHED + CONF_CM_CACHABLE_NONCOHERENT + CONF_CM_CACHABLE_CE + CONF_CM_CACHABLE_COW + CONF_CM_CACHABLE_CUW + CONF_CM_CACHABLE_ACCELERATED + + CONFIG_SYS_XWAY_EBU_BOOTCFG + + Special option for Lantiq XWAY SoCs for booting from NOR flash. + See also arch/mips/cpu/mips32/start.S. + + CONFIG_XWAY_SWAP_BYTES + + Enable compilation of tools/xway-swap-bytes needed for Lantiq + XWAY SoCs for booting from NOR flash. The U-Boot image needs to + be swapped if a flash programmer is used. + - Linux Kernel Interface: CONFIG_CLOCKS_IN_MHZ @@ -425,6 +480,16 @@ The following options need to be configured: crash. This is needed for buggy hardware (uc101) where no pull down resistor is connected to the signal IDE5V_DD7. + CONFIG_MACH_TYPE [relevant for ARM only][mandatory] + + This setting is mandatory for all boards that have only one + machine type and must be used to specify the machine type + number as it appears in the ARM machine registry + (see http://www.arm.linux.org.uk/developer/machines/). + Only boards that have multiple machine types supported + in a single configuration file and the machine type is + runtime discoverable, do not have to use this setting. + - vxWorks boot parameters: bootvx constructs a valid bootline using the following @@ -443,6 +508,17 @@ The following options need to be configured: Note: If a "bootargs" environment is defined, it will overwride the defaults discussed just above. +- Cache Configuration: + CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot + CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot + CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot + +- Cache Configuration for ARM: + CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache + controller + CONFIG_SYS_PL310_BASE - Physical base address of PL310 + controller register space + - Serial Ports: CONFIG_PL010_SERIAL @@ -463,6 +539,18 @@ The following options need to be configured: define this to a list of base addresses for each (supported) port. See e.g. include/configs/versatile.h + CONFIG_PL011_SERIAL_RLCR + + Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500) + have separate receive and transmit line control registers. Set + this variable to initialize the extra register. + + CONFIG_PL011_SERIAL_FLUSH_ON_INIT + + On some platforms (e.g. U8500) U-Boot is loaded by a second stage + boot loader that has already initialized the UART. Define this + variable to flush the UART at init time. + - Console Interface: Depending on board, define exactly one serial port @@ -536,6 +624,20 @@ The following options need to be configured: must be defined, to setup the maximum idle timeout for the SMC. +- Pre-Console Buffer: + Prior to the console being initialised (i.e. serial UART + initialised etc) all console output is silently discarded. + Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to + buffer any console messages prior to the console being + initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ + bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is + a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ + bytes are output before the console is initialised, the + earlier bytes are discarded. + + 'Sane' compilers will generate smaller code if + CONFIG_PRE_CON_BUF_SZ is a power of 2 + - Boot Delay: CONFIG_BOOTDELAY - in seconds Delay before automatically booting the default image; set to -1 to disable autoboot. @@ -620,6 +722,7 @@ The following options need to be configured: CONFIG_CMD_BOOTD bootd CONFIG_CMD_CACHE * icache, dcache CONFIG_CMD_CONSOLE coninfo + CONFIG_CMD_CRC32 * crc32 CONFIG_CMD_DATE * support for RTC, date/time... CONFIG_CMD_DHCP * DHCP support CONFIG_CMD_DIAG * Diagnostics @@ -632,22 +735,27 @@ The following options need to be configured: CONFIG_CMD_EDITENV edit env variable CONFIG_CMD_EEPROM * EEPROM read/write support CONFIG_CMD_ELF * bootelf, bootvx + CONFIG_CMD_EXPORTENV * export the environment CONFIG_CMD_SAVEENV saveenv CONFIG_CMD_FDC * Floppy Disk Support CONFIG_CMD_FAT * FAT partition support CONFIG_CMD_FDOS * Dos diskette Support CONFIG_CMD_FLASH flinfo, erase, protect CONFIG_CMD_FPGA FPGA device initialization support + CONFIG_CMD_GO * the 'go' command (exec code) + CONFIG_CMD_GREPENV * search environment CONFIG_CMD_HWFLOW * RTS/CTS hw flow control CONFIG_CMD_I2C * I2C serial bus support CONFIG_CMD_IDE * IDE harddisk support CONFIG_CMD_IMI iminfo CONFIG_CMD_IMLS List all found images CONFIG_CMD_IMMAP * IMMR dump support + CONFIG_CMD_IMPORTENV * import an environment CONFIG_CMD_IRQ * irqinfo CONFIG_CMD_ITEST Integer/string test of 2 values CONFIG_CMD_JFFS2 * JFFS2 Support CONFIG_CMD_KGDB * kgdb + CONFIG_CMD_LDRINFO ldrinfo (display Blackfin loader) CONFIG_CMD_LOADB loadb CONFIG_CMD_LOADS loads CONFIG_CMD_MD5SUM print md5 message digest @@ -675,12 +783,14 @@ The following options need to be configured: (requires CONFIG_CMD_I2C) CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) - CONFIG_CMD_SHA1 print sha1 memory digest + CONFIG_CMD_SHA1SUM print sha1 memory digest (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support + CONFIG_CMD_TFTPSRV * TFTP transfer in server mode + CONFIG_CMD_TFTPPUT * TFTP put command (upload) + CONFIG_CMD_TIME * run command and report execution time CONFIG_CMD_USB * USB support - CONFIG_CMD_VFD * VFD support (TRAB) CONFIG_CMD_CDP * Cisco Discover Protocol support CONFIG_CMD_FSL * Microblaze FSL support @@ -706,13 +816,50 @@ The following options need to be configured: XXX - this list needs to get updated! +- Device tree: + CONFIG_OF_CONTROL + If this variable is defined, U-Boot will use a device tree + to configure its devices, instead of relying on statically + compiled #defines in the board file. This option is + experimental and only available on a few boards. The device + tree is available in the global data as gd->fdt_blob. + + U-Boot needs to get its device tree from somewhere. This can + be done using one of the two options below: + + CONFIG_OF_EMBED + If this variable is defined, U-Boot will embed a device tree + binary in its image. This device tree file should be in the + board directory and called -.dts. The binary file + is then picked up in board_init_f() and made available through + the global data structure as gd->blob. + + CONFIG_OF_SEPARATE + If this variable is defined, U-Boot will build a device tree + binary. It will be called u-boot.dtb. Architecture-specific + code will locate it at run-time. Generally this works by: + + cat u-boot.bin u-boot.dtb >image.bin + + and in fact, U-Boot does this for you, creating a file called + u-boot-dtb.bin which is useful in the common case. You can + still use the individual files if you need something more + exotic. + - Watchdog: CONFIG_WATCHDOG If this variable is defined, it enables watchdog - support. There must be support in the platform specific - code for a watchdog. For the 8xx and 8260 CPUs, the - SIU Watchdog feature is enabled in the SYPCR - register. + support for the SoC. There must be support in the SoC + specific code for a watchdog. For the 8xx and 8260 + CPUs, the SIU Watchdog feature is enabled in the SYPCR + register. When supported for a specific SoC is + available, then no further board specific code should + be needed to use it. + + CONFIG_HW_WATCHDOG + When using a watchdog circuitry external to the used + SoC, then define this variable and provide board + specific code for the "hw_watchdog_reset" function. - U-Boot Version: CONFIG_VERSION_VARIABLE @@ -738,6 +885,8 @@ The following options need to be configured: CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 + CONFIG_SYS_RV3029_TCR - enable trickle charger on + RV3029 RTC. Note that if the RTC uses I2C, then the I2C interface must also be configured. See I2C Support, below. @@ -746,6 +895,10 @@ The following options need to be configured: CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO CONFIG_PCA953X_INFO - enable pca953x info command + The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of + chip-ngpio pairs that tell the PCA953X driver the number of + pins supported by a particular chip. + Note that if the GPIO device uses I2C, then the I2C interface must also be configured. See I2C Support, below. @@ -861,6 +1014,18 @@ The following options need to be configured: Define this to use i/o functions instead of macros (some hardware wont work with macros) + CONFIG_FTGMAC100 + Support for Faraday's FTGMAC100 Gigabit SoC Ethernet + + CONFIG_FTGMAC100_EGIGA + Define this to use GE link update with gigabit PHY. + Define this if FTGMAC100 is connected to gigabit PHY. + If your system has 10/100 PHY only, it might not occur + wrong behavior. Because PHY usually return timeout or + useless data when polling gigabit status and gigabit + control registers. This behavior won't affect the + correctnessof 10/100 link speed update. + CONFIG_SMC911X Support for SMSC's LAN911x and LAN921x chips @@ -876,6 +1041,18 @@ The following options need to be configured: automatically converts one 32 bit word to two 16 bit words you may also try CONFIG_SMC911X_32_BIT. + CONFIG_SH_ETHER + Support for Renesas on-chip Ethernet controller + + CONFIG_SH_ETHER_USE_PORT + Define the number of ports to be used + + CONFIG_SH_ETHER_PHY_ADDR + Define the ETH PHY's address + + CONFIG_SH_ETHER_CACHE_WRITEBACK + If this option is set, the driver enables cache flush. + - USB Support: At the moment only the UHCI host controller is supported (PIP405, MIP405, MPC5200); define @@ -971,6 +1148,15 @@ The following options need to be configured: enabled with CONFIG_CMD_MMC. The MMC driver also works with the FAT fs. This is enabled with CONFIG_CMD_FAT. + CONFIG_SH_MMCIF + Support for Renesas on-chip MMCIF controller + + CONFIG_SH_MMCIF_ADDR + Define the base address of MMCIF registers + + CONFIG_SH_MMCIF_CLK + Define the clock frequency for MMCIF + - Journaling Flash filesystem support: CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, CONFIG_JFFS2_NAND_DEV @@ -1041,6 +1227,25 @@ The following options need to be configured: and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP or CONFIG_VIDEO_SED13806_16BPP + CONFIG_FSL_DIU_FB + Enable the Freescale DIU video driver. Reference boards for + SOCs that have a DIU should define this macro to enable DIU + support, and should also define these other macros: + + CONFIG_SYS_DIU_ADDR + CONFIG_VIDEO + CONFIG_CMD_BMP + CONFIG_CFB_CONSOLE + CONFIG_VIDEO_SW_CURSOR + CONFIG_VGA_AS_SINGLE_DEVICE + CONFIG_VIDEO_LOGO + CONFIG_VIDEO_BMP_LOGO + + The DIU driver will look for the 'video-mode' environment + variable, and if defined, enable the DIU as a console during + boot. See the documentation file README.video for a + description of this variable. + - Keyboard Support: CONFIG_KEYBOARD @@ -1243,7 +1448,6 @@ The following options need to be configured: driver in use must provide a function: mcast() to join/leave a multicast group. - CONFIG_BOOTP_RANDOM_DELAY - BOOTP Recovery Mode: CONFIG_BOOTP_RANDOM_DELAY @@ -1603,12 +1807,12 @@ The following options need to be configured: => If you now switch to the new I2C Bus 3 with "i2c dev 3" - u-boot sends First the Commando to the mux@70 to enable - channel 6, and then the Commando to the mux@71 to enable + u-boot first sends the command to the mux@70 to enable + channel 6, and then the command to the mux@71 to enable the channel 4. After that, you can use the "normal" i2c commands as - usual, to communicate with your I2C devices behind + usual to communicate with your I2C devices behind the 2 muxes. This option is actually implemented for the bitbanging @@ -1632,6 +1836,11 @@ The following options need to be configured: SPI EEPROM, also an instance works with Crystal A/D and D/As on the SACSng board) + CONFIG_SH_SPI + + Enables the driver for SPI controller on SuperH. Currently + only SH7757 is supported. + CONFIG_SPI_X Enables extended (16-bit) SPI EEPROM addressing. @@ -2089,6 +2298,25 @@ FIT uImage format: -150 common/cmd_nand.c Incorrect FIT image format 151 common/cmd_nand.c FIT image format OK +- Standalone program support: + CONFIG_STANDALONE_LOAD_ADDR + + This option defines a board specific value for the + address where standalone program gets loaded, thus + overwriting the architecture dependent default + settings. + +- Frame Buffer Address: + CONFIG_FB_ADDR + + Define CONFIG_FB_ADDR if you want to use specific + address for frame buffer. + Then system will reserve the frame buffer address to + defined address instead of lcd_setmem (this function + grabs the memory for frame buffer by panel's size). + + Please see board_init_f function. + - Automatic software updates via TFTP server CONFIG_UPDATE_TFTP CONFIG_UPDATE_TFTP_CNT_MAX @@ -2108,11 +2336,50 @@ FIT uImage format: Adds the MTD partitioning infrastructure from the Linux kernel. Needed for UBI support. +- SPL framework + CONFIG_SPL + Enable building of SPL globally. + + CONFIG_SPL_TEXT_BASE + TEXT_BASE for linking the SPL binary. + + CONFIG_SPL_LDSCRIPT + LDSCRIPT for linking the SPL binary. + + CONFIG_SPL_LIBCOMMON_SUPPORT + Support for common/libcommon.o in SPL binary + + CONFIG_SPL_LIBDISK_SUPPORT + Support for disk/libdisk.o in SPL binary + + CONFIG_SPL_I2C_SUPPORT + Support for drivers/i2c/libi2c.o in SPL binary + + CONFIG_SPL_GPIO_SUPPORT + Support for drivers/gpio/libgpio.o in SPL binary + + CONFIG_SPL_MMC_SUPPORT + Support for drivers/mmc/libmmc.o in SPL binary + + CONFIG_SPL_SERIAL_SUPPORT + Support for drivers/serial/libserial.o in SPL binary + + CONFIG_SPL_SPI_FLASH_SUPPORT + Support for drivers/mtd/spi/libspi_flash.o in SPL binary + + CONFIG_SPL_SPI_SUPPORT + Support for drivers/spi/libspi.o in SPL binary + + CONFIG_SPL_FAT_SUPPORT + Support for fs/fat/libfat.o in SPL binary + + CONFIG_SPL_LIBGENERIC_SUPPORT + Support for lib/libgeneric.o in SPL binary Modem Support: -------------- -[so far only for SMDK2400 and TRAB boards] +[so far only for SMDK2400 boards] - Modem support enable: CONFIG_MODEM_SUPPORT @@ -2248,7 +2515,7 @@ Configuration Settings: - CONFIG_SYS_MONITOR_BASE: Physical start address of boot monitor code (set by make config files to be same as the text base address - (TEXT_BASE) used when linking) - same as + (CONFIG_SYS_TEXT_BASE) used when linking) - same as CONFIG_SYS_FLASH_BASE when booting from flash. - CONFIG_SYS_MONITOR_LEN: @@ -2273,7 +2540,23 @@ Configuration Settings: used) must be put below this limit, unless "bootm_low" enviroment variable is defined and non-zero. In such case all data for the Linux kernel must be between "bootm_low" - and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. + and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment + variable "bootm_mapsize" will override the value of + CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined, + then the value in "bootm_size" will be used instead. + +- CONFIG_SYS_BOOT_RAMDISK_HIGH: + Enable initrd_high functionality. If defined then the + initrd_high feature is enabled and the bootm ramdisk subcommand + is enabled. + +- CONFIG_SYS_BOOT_GET_CMDLINE: + Enables allocating and saving kernel cmdline in space between + "bootm_low" and "bootm_low" + BOOTMAPSZ. + +- CONFIG_SYS_BOOT_GET_KBD: + Enables allocating and saving a kernel copy of the bd_info in + space between "bootm_low" and "bootm_low" + BOOTMAPSZ. - CONFIG_SYS_MAX_FLASH_BANKS: Max number of Flash memory banks @@ -2351,16 +2634,21 @@ Configuration Settings: - CONFIG_ENV_MAX_ENTRIES - Maximum number of entries in the hash table that is used - internally to store the environment settings. The default - setting is supposed to be generous and should work in most - cases. This setting can be used to tune behaviour; see - lib/hashtable.c for details. + Maximum number of entries in the hash table that is used + internally to store the environment settings. The default + setting is supposed to be generous and should work in most + cases. This setting can be used to tune behaviour; see + lib/hashtable.c for details. The following definitions that deal with the placement and management of environment data (variable area); in general, we support the following configurations: +- CONFIG_BUILD_ENVCRC: + + Builds up envcrc with the target environment so that external utils + may easily extract it and embed it in final U-Boot images. + - CONFIG_ENV_IS_IN_FLASH: Define this if the environment is in flash memory. @@ -2534,18 +2822,32 @@ to save the current settings. - CONFIG_ENV_SIZE: These two #defines specify the offset and size of the environment - area within the first NAND device. + area within the first NAND device. CONFIG_ENV_OFFSET must be + aligned to an erase block boundary. - - CONFIG_ENV_OFFSET_REDUND + - CONFIG_ENV_OFFSET_REDUND (optional): This setting describes a second storage area of CONFIG_ENV_SIZE - size used to hold a redundant copy of the environment data, - so that there is a valid backup copy in case there is a - power failure during a "saveenv" operation. + size used to hold a redundant copy of the environment data, so + that there is a valid backup copy in case there is a power failure + during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be + aligned to an erase block boundary. - Note: CONFIG_ENV_OFFSET and CONFIG_ENV_OFFSET_REDUND must be aligned - to a block boundary, and CONFIG_ENV_SIZE must be a multiple of - the NAND devices block size. + - CONFIG_ENV_RANGE (optional): + + Specifies the length of the region in which the environment + can be written. This should be a multiple of the NAND device's + block size. Specifying a range with more erase blocks than + are needed to hold CONFIG_ENV_SIZE allows bad blocks within + the range to be avoided. + + - CONFIG_ENV_OFFSET_OOB (optional): + + Enables support for dynamically retrieving the offset of the + environment from block zero's out-of-band data. The + "nand env.oob" command can be used to record this offset. + Currently, CONFIG_ENV_OFFSET_REDUND is not supported when + using CONFIG_ENV_OFFSET_OOB. - CONFIG_NAND_ENV_DST @@ -2608,6 +2910,43 @@ Low Level (hardware related) configuration options: and RPXsuper) to be able to adjust the position of the IMMR register after a reset. +- CONFIG_SYS_CCSRBAR_DEFAULT: + Default (power-on reset) physical address of CCSR on Freescale + PowerPC SOCs. + +- CONFIG_SYS_CCSRBAR: + Virtual address of CCSR. On a 32-bit build, this is typically + the same value as CONFIG_SYS_CCSRBAR_DEFAULT. + + CONFIG_SYS_DEFAULT_IMMR must also be set to this value, + for cross-platform code that uses that macro instead. + +- CONFIG_SYS_CCSRBAR_PHYS: + Physical address of CCSR. CCSR can be relocated to a new + physical address, if desired. In this case, this macro should + be set to that address. Otherwise, it should be set to the + same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR + is typically relocated on 36-bit builds. It is recommended + that this macro be defined via the _HIGH and _LOW macros: + + #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH + * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW) + +- CONFIG_SYS_CCSRBAR_PHYS_HIGH: + Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically + either 0 (32-bit build) or 0xF (36-bit build). This macro is + used in assembly code, so it must not contain typecasts or + integer size suffixes (e.g. "ULL"). + +- CONFIG_SYS_CCSRBAR_PHYS_LOW: + Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is + used in assembly code, so it must not contain typecasts or + integer size suffixes (e.g. "ULL"). + +- CONFIG_SYS_CCSR_DO_NOT_RELOCATE: + If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be + forced to a value that ensures that CCSR is not relocated. + - Floppy Disk Support: CONFIG_SYS_FDC_DRIVE_NUMBER @@ -2634,6 +2973,14 @@ Low Level (hardware related) configuration options: source code. It is used to make hardware dependant initializations. +- CONFIG_IDE_AHB: + Most IDE controllers were designed to be connected with PCI + interface. Only few of them were designed for AHB interface. + When software is doing ATA command and data transfer to + IDE devices through IDE-AHB controller, some additional + registers accessing to these kind of IDE-AHB controller + is requierd. + - CONFIG_SYS_IMMR: Physical address of the Internal Memory. DO NOT CHANGE unless you know exactly what you're doing! (11-4) [MPC8xx/82xx systems only] @@ -2659,7 +3006,7 @@ Low Level (hardware related) configuration options: area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial data is located at the end of the available space - (sometimes written as (CONFIG_SYS_INIT_RAM_END - + (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) downward. @@ -2744,6 +3091,32 @@ Low Level (hardware related) configuration options: Disable PCI-Express on systems where it is supported but not required. +- CONFIG_SYS_SRIO: + Chip has SRIO or not + +- CONFIG_SRIO1: + Board has SRIO 1 port available + +- CONFIG_SRIO2: + Board has SRIO 2 port available + +- CONFIG_SYS_SRIOn_MEM_VIRT: + Virtual Address of SRIO port 'n' memory region + +- CONFIG_SYS_SRIOn_MEM_PHYS: + Physical Address of SRIO port 'n' memory region + +- CONFIG_SYS_SRIOn_MEM_SIZE: + Size of SRIO port 'n' memory region + +- CONFIG_SYS_NDFC_16 + Defined to tell the NDFC that the NAND chip is using a + 16 bit bus. + +- CONFIG_SYS_NDFC_EBC0_CFG + Sets the EBC0_CFG register for the NDFC. If not defined + a default value will be used. + - CONFIG_SPD_EEPROM Get DDR timing information from an I2C EEPROM. Common with pluggable memory modules such as SODIMMs @@ -2756,6 +3129,15 @@ Low Level (hardware related) configuration options: one, specify here. Note that the value must resolve to something your driver can deal with. +- CONFIG_SYS_DDR_RAW_TIMING + Get DDR timing information from other than SPD. Common with + soldered DDR chips onboard without SPD. DDR raw timing + parameters are extracted from datasheet and hard-coded into + header files or board specific files. + +- CONFIG_FSL_DDR_INTERACTIVE + Enable interactive DDR debugging. See doc/README.fsl-ddr. + - CONFIG_SYS_83XX_DDR_USES_CS0 Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. @@ -2809,23 +3191,27 @@ Low Level (hardware related) configuration options: globally (CONFIG_CMD_MEM). - CONFIG_SKIP_LOWLEVEL_INIT -- CONFIG_SKIP_RELOCATE_UBOOT - - [ARM only] If these variables are defined, then - certain low level initializations (like setting up - the memory controller) are omitted and/or U-Boot does - not relocate itself into RAM. - Normally these variables MUST NOT be defined. The - only exception is when U-Boot is loaded (to RAM) by - some other boot loader or by a debugger which - performs these initializations itself. + [ARM, NDS32, MIPS only] If this variable is defined, then certain + low level initializations (like setting up the memory + controller) are omitted and/or U-Boot does not + relocate itself into RAM. -- CONFIG_PRELOADER + Normally this variable MUST NOT be defined. The only + exception is when U-Boot is loaded (to RAM) by some + other boot loader or by a debugger which performs + these initializations itself. +- CONFIG_SPL_BUILD Modifies the behaviour of start.S when compiling a loader that is executed before the actual U-Boot. E.g. when compiling a NAND SPL. +- CONFIG_USE_ARCH_MEMCPY + CONFIG_USE_ARCH_MEMSET + If these options are used a optimized version of memcpy/memset will + be used if available. These functions may be faster under some + conditions but may increase the binary size. + Building the Software: ====================== @@ -2989,6 +3375,7 @@ bootp - boot image via network using BootP/TFTP protocol tftpboot- boot image via network using TFTP protocol and env variables "ipaddr" and "serverip" (and eventually "gatewayip") +tftpput - upload a file via network using TFTP protocol rarpboot- boot image via network using RARP/TFTP protocol diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd' loads - load S-Record file over serial line @@ -3066,7 +3453,16 @@ List of environment variables (most likely not complete): for use by the bootm command. See also "bootm_size" environment variable. Address defined by "bootm_low" is also the base of the initial memory mapping for the Linux - kernel -- see the description of CONFIG_SYS_BOOTMAPSZ. + kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and + bootm_mapsize. + + bootm_mapsize - Size of the initial memory mapping for the Linux kernel. + This variable is given as a hexadecimal number and it + defines the size of the memory region starting at base + address bootm_low that is accessible by the Linux kernel + during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used + as the default value if it is defined, and bootm_size is + used otherwise. bootm_size - Memory range available for image processing in the bootm command can be restricted. This variable is given as @@ -3094,6 +3490,15 @@ List of environment variables (most likely not complete): This can be used to load and uncompress arbitrary data. + fdt_high - if set this restricts the maximum address that the + flattened device tree will be copied into upon boot. + If this is set to the special value 0xFFFFFFFF then + the fdt will not be copied at all on boot. For this + to work it must reside in writable memory, have + sufficient padding on the end of it for u-boot to + add the information it needs into it, and the memory + must be accessible by the kernel. + i2cfast - (PPC405GP|PPC405EP only) if set to 'y' configures Linux I2C driver for fast mode (400kHZ). This environment variable is used in @@ -3144,12 +3549,10 @@ List of environment variables (most likely not complete): bootstopkey - see CONFIG_AUTOBOOT_STOP_STR - ethprime - When CONFIG_NET_MULTI is enabled controls which - interface is used first. + ethprime - controls which interface is used first. - ethact - When CONFIG_NET_MULTI is enabled controls which - interface is currently active. For example you - can do the following + ethact - controls which interface is currently active. + For example you can do the following => setenv ethact FEC => ping 192.168.0.1 # traffic sent on FEC @@ -3191,6 +3594,25 @@ List of environment variables (most likely not complete): Ethernet is encapsulated/received over 802.1q VLAN tagged frames. +The following image location variables contain the location of images +used in booting. The "Image" column gives the role of the image and is +not an environment variable name. The other columns are environment +variable names. "File Name" gives the name of the file on a TFTP +server, "RAM Address" gives the location in RAM the image will be +loaded to, and "Flash Location" gives the image's address in NOR +flash or offset in NAND flash. + +*Note* - these variables don't have to be defined for all boards, some +boards currenlty use other variables for these purposes, and some +boards use these variables for other purposes. + +Image File Name RAM Address Flash Location +----- --------- ----------- -------------- +u-boot u-boot u-boot_addr_r u-boot_addr +Linux kernel bootfile kernel_addr_r kernel_addr +device tree blob fdtfile fdt_addr_r fdt_addr +ramdisk ramdiskfile ramdisk_addr_r ramdisk_addr + The following environment variables may be used and automatically updated by the network boot commands ("bootp" and "rarpboot"), depending the information provided by your boot server: @@ -3337,8 +3759,8 @@ details; basically, the header defines the following image properties: Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS, INTEGRITY). * Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86, - IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; - Currently supported: ARM, AVR32, Intel x86, MIPS, Nios II, PowerPC). + IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; + Currently supported: ARM, AVR32, Intel x86, MIPS, NDS32, Nios II, PowerPC). * Compression Type (uncompressed, gzip, bzip2) * Load Address * Entry Point @@ -4031,6 +4453,20 @@ On Nios II, the ABI is documented here: Note: on Nios II, we give "-G0" option to gcc and don't use gp to access small data sections, so gp is free. +On NDS32, the following registers are used: + + R0-R1: argument/return + R2-R5: argument + R15: temporary register for assembler + R16: trampoline register + R28: frame pointer (FP) + R29: global pointer (GP) + R30: link register (LP) + R31: stack pointer (SP) + PC: program counter (PC) + + ==> U-Boot will use R10 to hold a pointer to the global data + NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope, or current versions of GCC may "optimize" the code too much. @@ -4196,9 +4632,7 @@ Coding Standards: All contributions to U-Boot should conform to the Linux kernel coding style; see the file "Documentation/CodingStyle" and the script -"scripts/Lindent" in your Linux kernel source directory. In sources -originating from U-Boot a style corresponding to "Lindent -pcs" (adding -spaces before parameters to function calls) is actually used. +"scripts/Lindent" in your Linux kernel source directory. Source files originating from a different project (for example the MTD subsystem) are generally exempt from these guidelines and are not @@ -4211,9 +4645,9 @@ in your code. Please also stick to the following formatting rules: - remove any trailing white space -- use TAB characters for indentation, not spaces +- use TAB characters for indentation and vertical alignment, not spaces - make sure NOT to use DOS '\r\n' line feeds -- do not add more than 2 empty lines to source files +- do not add more than 2 consecutive empty lines to source files - do not add trailing empty lines to source files Submissions which do not conform to the standards may be returned @@ -4247,14 +4681,14 @@ it: * For major contributions, your entry to the CREDITS file * When you add support for a new board, don't forget to add this - board to the MAKEALL script, too. + board to the MAINTAINERS file, too. * If your patch adds new configuration options, don't forget to document these in the README file. * The patch itself. If you are using git (which is *strongly* recommended) you can easily generate the patch using the - "git-format-patch". If you then use "git-send-email" to send it to + "git format-patch". If you then use "git send-email" to send it to the U-Boot mailing list, you will avoid most of the common problems with some other mail clients.