X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=include%2Fppc4xx.h;h=f1478854d116e30f9d69789b15da56dd1bb807d9;hb=440db474498d110ef56ba6a4cd8d5ae3fa7b7573;hp=e216663a86de7a4a1864a0af10ad6bfc07f61e82;hpb=650a9e7abc44ce1ce73d6668eaf0ba2d6b8025e9;p=oweals%2Fu-boot.git diff --git a/include/ppc4xx.h b/include/ppc4xx.h index e216663a86..f1478854d1 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -107,8 +107,8 @@ * Enable long long (%ll ...) printf format on 440 PPC's since most of * them support 36bit physical addressing */ -#define CFG_64BIT_VSPRINTF -#define CFG_64BIT_STRTOUL +#define CONFIG_SYS_64BIT_VSPRINTF +#define CONFIG_SYS_64BIT_STRTOUL #include #else #include @@ -143,7 +143,7 @@ #define _START_OFFSET (EXC_OFF_SYS_RESET + 0x2000) #define RESET_VECTOR 0xfffffffc -#define CACHELINE_MASK (CFG_CACHELINE_SIZE - 1) /* Address mask for cache +#define CACHELINE_MASK (CONFIG_SYS_CACHELINE_SIZE - 1) /* Address mask for cache line aligned data. */ #define CPR0_DCR_BASE 0x0C @@ -218,4 +218,7 @@ static inline void set_mcsr(u32 val) #endif /* __ASSEMBLY__ */ +/* for multi-cpu support */ +#define NA_OR_UNKNOWN_CPU -1 + #endif /* __PPC4XX_H__ */