X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=include%2Fmpc83xx.h;h=a4c5bd383761858946ab3d9bec187516a5e84b70;hb=5cb4860f3df83da9610baf0ac3a4f2836fdfa328;hp=a6d721a89ad1a379b7f049d79a36d4f6af344d75;hpb=3be2bdf5dc69b3142c1162a59bc67191c9077567;p=oweals%2Fu-boot.git

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index a6d721a89a..a4c5bd3837 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2004-2007, 2010 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __MPC83XX_H__
@@ -1111,6 +1110,8 @@
 #define CSBNDS_EA			0x000000FF
 #define CSBNDS_EA_SHIFT			24
 
+#ifndef CONFIG_MPC83XX_SDRAM
+
 /*
  * CSn_CONFIG - Chip Select Configuration Register
  */
@@ -1297,7 +1298,6 @@
  */
 #define SDRAM_INTERVAL_REFINT		0x3FFF0000
 #define SDRAM_INTERVAL_REFINT_SHIFT	16
-#define SDRAM_INTERVAL_BSTOPRE		0x00003FFF
 #define SDRAM_INTERVAL_BSTOPRE_SHIFT	0
 
 /*
@@ -1409,6 +1409,8 @@
 #define ECC_ERROR_MAN_SBEC		(0xff000000 >> 24)
 #define ECC_ERROR_MAN_SBEC_SHIFT	0
 
+#endif /* !CONFIG_MPC83XX_SDRAM */
+
 /*
  * CONFIG_ADDRESS - PCI Config Address Register
  */
@@ -1512,6 +1514,7 @@
  */
 #define PMCCR1_POWER_OFF		0x00000020
 
+#ifndef CONFIG_RAM
 /*
  * DDRCDR - DDR Control Driver Register
  */
@@ -1533,6 +1536,7 @@
 #define DDRCDR_DDR_CFG		0x00040000
 #define DDRCDR_M_ODR		0x00000002
 #define DDRCDR_Q_DRN		0x00000001
+#endif /* !CONFIG_RAM */
 
 /*
  * PCIE Bridge Register