X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FMPC8569MDS.h;h=de5a7ca959e4a7eef2488067677f1ca2a55a1702;hb=7c2e535770f56f5788e3771b9ee2dbf40ec4d93f;hp=d877e8bbd1812d8a94774fccf3fa06228e9e9122;hpb=7f673c99c2d8d1aa21996c5b914f06d784b080ca;p=oweals%2Fu-boot.git diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index d877e8bbd1..de5a7ca959 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2009-2011 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -10,19 +9,9 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/68 */ -#define CONFIG_MPC8569 1 /* MPC8569 specific */ -#define CONFIG_MPC8569MDS 1 /* MPC8569MDS board specific */ - -#define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */ - #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_PCI 1 /* Disable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controller */ #define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ @@ -30,7 +19,6 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_QE /* Enable QE */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); @@ -50,22 +38,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#ifdef CONFIG_NAND -#define CONFIG_NAND_U_BOOT 1 -#define CONFIG_RAMBOOT_NAND 1 -#ifdef CONFIG_NAND_SPL -#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ -#else -#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds -#define CONFIG_SYS_TEXT_BASE 0xf8f82000 -#endif -#endif - -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xfff80000 -#endif - #ifndef CONFIG_SYS_MONITOR_BASE #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif @@ -75,8 +47,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_ENABLE_36BIT_PHYS 1 -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ -#define CONFIG_BOARD_EARLY_INIT_R 1 #define CONFIG_HWCONFIG #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ @@ -98,8 +68,6 @@ extern unsigned long get_clock_freq(void); #endif /* DDR Setup */ -#define CONFIG_SYS_FSL_DDR3 -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ @@ -110,7 +78,6 @@ extern unsigned long get_clock_freq(void); /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) @@ -181,15 +148,8 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_RAMBOOT_NAND) -#define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_EXTRA_ENV_RELOC -#else #undef CONFIG_SYS_RAMBOOT -#endif -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO /* Chip select 3 - NAND */ @@ -212,8 +172,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_MTD_NAND_VERIFY_WRITE 1 -#define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) #define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \ @@ -229,17 +187,10 @@ extern unsigned long get_clock_freq(void); | OR_FCM_TRLX \ | OR_FCM_EHTR) -#ifdef CONFIG_RAMBOOT_NAND -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM/* NAND Options */ -#define CONFIG_SYS_BR3_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR3_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ -#else #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ #define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ #define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#endif #define CONFIG_SYS_LBC_LCRR 0x00000004 /* LB clock ratio reg */ #define CONFIG_SYS_LBC_LBCR 0x00040000 /* LB config reg */ @@ -258,8 +209,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* Serial Port */ -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -273,16 +222,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) -/* Use the HUSH parser*/ -#define CONFIG_SYS_HUSH_PARSER -#ifdef CONFIG_SYS_HUSH_PARSER -#endif - -/* pass open firmware flat tree */ -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 -#define CONFIG_OF_STDOUT_VIA_ALIAS 1 - /* * I2C */ @@ -462,12 +401,8 @@ extern unsigned long get_clock_freq(void); #endif /* CONFIG_QE */ #if defined(CONFIG_PCI) - -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP -#define CONFIG_E1000 /* Define e1000 pci Ethernet card */ #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ @@ -477,13 +412,7 @@ extern unsigned long get_clock_freq(void); * Environment */ #if defined(CONFIG_SYS_RAMBOOT) -#if defined(CONFIG_RAMBOOT_NAND) -#define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) -#endif #else -#define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ #define CONFIG_ENV_SIZE 0x2000 @@ -494,64 +423,29 @@ extern unsigned long get_clock_freq(void); /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xfff00000 +#define CONFIG_SYS_QE_FW_ADDR 0xfff00000 /* * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_PING -#define CONFIG_CMD_I2C -#define CONFIG_CMD_MII -#define CONFIG_CMD_ELF -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_SETEXPR -#define CONFIG_CMD_REGINFO - -#if defined(CONFIG_PCI) - #define CONFIG_CMD_PCI -#endif - #undef CONFIG_WATCHDOG /* watchdog disabled */ -#define CONFIG_MMC 1 - #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#define CONFIG_CMD_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION #endif /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */ #else #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) - /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ @@ -571,7 +465,7 @@ extern unsigned long get_clock_freq(void); /* * Environment Configuration */ -#define CONFIG_HOSTNAME mpc8569mds +#define CONFIG_HOSTNAME "mpc8569mds" #define CONFIG_ROOTPATH "/nfsroot" #define CONFIG_BOOTFILE "your.uImage" @@ -581,11 +475,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/ -#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ -#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ - -#define CONFIG_BAUDRATE 115200 - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \