X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FMPC8308RDB.h;h=4150d5aad05f834839b0050d04001f31da7161c9;hb=bc3199fd1875f89e9e1fb2af45665c4a718217b9;hp=334c96ea3801d980ece68386344620cbee5a1b5f;hpb=2fef402097866b4172d7a966a72397a5ccba5b10;p=oweals%2Fu-boot.git diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 334c96ea38..4150d5aad0 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -3,33 +3,20 @@ * Copyright (C) 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com * * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + /* * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ +#define CONFIG_MPC830x 1 /* MPC830x family */ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ #define CONFIG_MPC8308RDB 1 /* MPC8308RDB board specific */ @@ -37,6 +24,24 @@ #define CONFIG_MISC_INIT_R +/* new uImage format support */ +#define CONFIG_FIT 1 +#define CONFIG_FIT_VERBOSE 1 + +#define CONFIG_MMC 1 + +#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR +#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ESDHC_USE_PIO + +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif + /* * On-board devices * @@ -239,19 +244,18 @@ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_8MB) -#define CONFIG_SYS_BR0_PRELIM (\ - CONFIG_SYS_FLASH_BASE /* Flash Base address */ |\ - (2 << BR_PS_SHIFT) /* 16 bit port size */ |\ - BR_V) /* valid */ -#define CONFIG_SYS_OR0_PRELIM ((~(CONFIG_SYS_FLASH_SIZE - 1) << 20) \ +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ + | BR_PS_16 /* 16 bit port */ \ + | BR_MS_GPCM /* MSEL = GPCM */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ | OR_UPM_XAM \ | OR_GPCM_CSNT \ | OR_GPCM_ACS_DIV2 \ | OR_GPCM_XACS \ | OR_GPCM_SCY_15 \ - | OR_GPCM_TRLX \ - | OR_GPCM_EHTR \ - | OR_GPCM_EAD) + | OR_GPCM_TRLX_SET \ + | OR_GPCM_EHTR_SET) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ /* 127 64KB sectors and 8 8KB top sectors per device */ @@ -264,12 +268,13 @@ * NAND Flash on the Local Bus */ #define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ +#define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024) /* 0x00008000 */ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_NAND_BASE \ - | (2< " /* Pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 @@ -319,15 +336,28 @@ #define CONFIG_OF_STDOUT_VIA_ALIAS 1 /* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_FSL_I2C -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} } /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 - +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} } + +/* + * SPI on header J8 + * + * WARNING: enabling this will break TSEC2 (connected to the Vitesse switch) + * due to a pinmux conflict between GPIO9 (SPI chip select )and the TSEC2 pins. + */ +#ifdef CONFIG_MPC8XXX_SPI +#define CONFIG_CMD_SPI +#define CONFIG_USE_SPIFLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_CMD_SF +#endif /* * Board info - revision and where boot from @@ -358,6 +388,7 @@ #define CONFIG_SYS_SCCR_PCIEXP1CM 1 #define CONFIG_PCI +#define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE #define CONFIG_PCI_PNP /* do pci plug-and-play */ @@ -415,13 +446,10 @@ /* * Command line configuration. */ -#include - #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C #define CONFIG_CMD_MII -#define CONFIG_CMD_NET #define CONFIG_CMD_PCI #define CONFIG_CMD_PING @@ -432,7 +460,6 @@ */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -441,7 +468,6 @@ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ /* * For booting Linux, the board info and command line data @@ -513,9 +539,6 @@ #define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ -#define xstr(s) str(s) -#define str(s) #s - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ @@ -549,10 +572,10 @@ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ "bootcmd=run flash_self\0" \ "load=tftp ${loadaddr} ${u-boot}\0" \ - "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \ + "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \ + " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\ " +${filesize};cp.b ${fileaddr} " \ - xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \ + __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \ "upd=run load update\0" \ #endif /* __CONFIG_H */