X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fserial%2Faltera_uart.c;h=eff9c592d65159f451800aff05b2c33ca07c0b66;hb=cef68bf9042dda6b77b5845a25f37b9ea882074b;hp=045f1197a344476c4a80bb1bef29d3c43b6cdc29;hpb=92abce8731750e92d9b5adf2e506fdb50eff59bc;p=oweals%2Fu-boot.git diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c index 045f1197a3..eff9c592d6 100644 --- a/drivers/serial/altera_uart.c +++ b/drivers/serial/altera_uart.c @@ -2,93 +2,152 @@ * (C) Copyright 2004, Psyent Corporation * Scott McNutt * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ - #include -#include +#include +#include +#include #include -#include DECLARE_GLOBAL_DATA_PTR; -/*------------------------------------------------------------------ - * UART the serial port - *-----------------------------------------------------------------*/ +/* status register */ +#define ALTERA_UART_TMT BIT(5) /* tx empty */ +#define ALTERA_UART_TRDY BIT(6) /* tx ready */ +#define ALTERA_UART_RRDY BIT(7) /* rx ready */ + +struct altera_uart_regs { + u32 rxdata; /* Rx data reg */ + u32 txdata; /* Tx data reg */ + u32 status; /* Status reg */ + u32 control; /* Control reg */ + u32 divisor; /* Baud rate divisor reg */ + u32 endofpacket; /* End-of-packet reg */ +}; + +struct altera_uart_platdata { + struct altera_uart_regs *regs; + unsigned int uartclk; +}; + +static int altera_uart_setbrg(struct udevice *dev, int baudrate) +{ + struct altera_uart_platdata *plat = dev->platdata; + struct altera_uart_regs *const regs = plat->regs; + u32 div; -static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE; + div = (plat->uartclk / baudrate) - 1; + writel(div, ®s->divisor); -#if defined(CONFIG_SYS_NIOS_FIXEDBAUD) + return 0; +} -/* Everything's already setup for fixed-baud PTF - * assignment - */ -void serial_setbrg (void){ return; } -int serial_init (void) { return (0);} +static int altera_uart_putc(struct udevice *dev, const char ch) +{ + struct altera_uart_platdata *plat = dev->platdata; + struct altera_uart_regs *const regs = plat->regs; -#else + if (!(readl(®s->status) & ALTERA_UART_TRDY)) + return -EAGAIN; -void serial_setbrg (void) -{ - unsigned div; + writel(ch, ®s->txdata); - div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; - writel (div, &uart->divisor); - return; + return 0; } -int serial_init (void) +static int altera_uart_pending(struct udevice *dev, bool input) { - serial_setbrg (); - return (0); + struct altera_uart_platdata *plat = dev->platdata; + struct altera_uart_regs *const regs = plat->regs; + u32 st = readl(®s->status); + + if (input) + return st & ALTERA_UART_RRDY ? 1 : 0; + else + return !(st & ALTERA_UART_TMT); } -#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */ +static int altera_uart_getc(struct udevice *dev) +{ + struct altera_uart_platdata *plat = dev->platdata; + struct altera_uart_regs *const regs = plat->regs; + + if (!(readl(®s->status) & ALTERA_UART_RRDY)) + return -EAGAIN; -/*----------------------------------------------------------------------- - * UART CONSOLE - *---------------------------------------------------------------------*/ -void serial_putc (char c) + return readl(®s->rxdata) & 0xff; +} + +static int altera_uart_probe(struct udevice *dev) { - if (c == '\n') - serial_putc ('\r'); - while ((readl (&uart->status) & NIOS_UART_TRDY) == 0) - WATCHDOG_RESET (); - writel ((unsigned char)c, &uart->txdata); + return 0; } -void serial_puts (const char *s) +static int altera_uart_ofdata_to_platdata(struct udevice *dev) { - while (*s != 0) { - serial_putc (*s++); - } + struct altera_uart_platdata *plat = dev_get_platdata(dev); + + plat->regs = map_physmem(dev_get_addr(dev), + sizeof(struct altera_uart_regs), + MAP_NOCACHE); + plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "clock-frequency", 0); + + return 0; } -int serial_tstc (void) +static const struct dm_serial_ops altera_uart_ops = { + .putc = altera_uart_putc, + .pending = altera_uart_pending, + .getc = altera_uart_getc, + .setbrg = altera_uart_setbrg, +}; + +static const struct udevice_id altera_uart_ids[] = { + { .compatible = "altr,uart-1.0" }, + {} +}; + +U_BOOT_DRIVER(altera_uart) = { + .name = "altera_uart", + .id = UCLASS_SERIAL, + .of_match = altera_uart_ids, + .ofdata_to_platdata = altera_uart_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct altera_uart_platdata), + .probe = altera_uart_probe, + .ops = &altera_uart_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +#ifdef CONFIG_DEBUG_UART_ALTERA_UART + +#include + +static inline void _debug_uart_init(void) { - return (readl (&uart->status) & NIOS_UART_RRDY); + struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; + u32 div; + + div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1; + writel(div, ®s->divisor); } -int serial_getc (void) +static inline void _debug_uart_putc(int ch) { - while (serial_tstc () == 0) - WATCHDOG_RESET (); - return (readl (&uart->rxdata) & 0x00ff ); + struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; + + while (1) { + u32 st = readl(®s->status); + + if (st & ALTERA_UART_TRDY) + break; + } + + writel(ch, ®s->txdata); } + +DEBUG_UART_FUNCS + +#endif