X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=doc%2FREADME.generic_usb_ohci;h=61300c35758a8c0c222c8605713d2ee90b984ee3;hb=52dd56ba847acd048205e6412e779fda991c95d3;hp=147ea514ae92c26127244e323408f1540cd0d71d;hpb=1a247ba7fa5fb09f56892a09a990f03ce564b3e2;p=oweals%2Fu-boot.git diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci index 147ea514ae..61300c3575 100644 --- a/doc/README.generic_usb_ohci +++ b/doc/README.generic_usb_ohci @@ -11,24 +11,24 @@ Configuration options CONFIG_USB_OHCI_NEW: enable the new OHCI driver - CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks: + CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks: - extern int usb_board_init(void); - extern int usb_board_stop(void); - extern int usb_cpu_init_fail(void); - CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks: + CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks: - extern int usb_cpu_init(void); - extern int usb_cpu_stop(void); - extern int usb_cpu_init_fail(void); - CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI + CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers - CFG_USB_OHCI_SLOT_NAME: slot name + CONFIG_SYS_USB_OHCI_SLOT_NAME: slot name - CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the + CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the root hub. @@ -36,10 +36,10 @@ Endianness issues ------------------ The USB bus operates in little endian, but unfortunately there are -OHCI controllers that operate in big endian such as ppc4xx and -mpc5xxx. For these the config option +OHCI controllers that operate in big endian such as ppc4xx. For these the +config option - CFG_OHCI_BE_CONTROLLER + CONFIG_SYS_OHCI_BE_CONTROLLER needs to be defined. @@ -60,4 +60,4 @@ If undefined, the first instance found in PCI space will be used. PCI Controllers need to do byte swapping on register accesses, so they should to define: - CFG_OHCI_SWAP_REG_ACCESS + CONFIG_SYS_OHCI_SWAP_REG_ACCESS