X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=cpu%2Fmpc8xx%2Finterrupts.c;h=20e7012c3724e6b02b7b628973720ff22b6db222;hb=4734cb78d8e57dbac4e9f23d91edd624484b0092;hp=558dc09c078de5969b12c63d357760188c0c05f3;hpb=a8c7c708a9e0051c6358718c53572a4681eaa22b;p=oweals%2Fu-boot.git

diff --git a/cpu/mpc8xx/interrupts.c b/cpu/mpc8xx/interrupts.c
index 558dc09c07..20e7012c37 100644
--- a/cpu/mpc8xx/interrupts.c
+++ b/cpu/mpc8xx/interrupts.c
@@ -274,11 +274,21 @@ void timer_interrupt_cpu (struct pt_regs *regs)
 	/* Reset Timer Expired and Timers Interrupt Status */
 	immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
 	__asm__ ("nop");
-#ifdef CONFIG_MPC866_et_al
-	immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS;
-#else
-	immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST;
-#endif
+	/*
+	  Clear TEXPS (and TMIST on older chips). SPLSS (on older
+	  chips) is cleared too.
+
+	  Bitwise OR is a read-modify-write operation so ALL bits
+	  which are cleared by writing `1' would be cleared by
+	  operations like
+
+	  immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS;
+
+	  The same can be achieved by simple writing of the PLPRCR
+	  to itself. If a bit value should be preserved, read the
+	  register, ZERO the bit and write, not OR, the result back.
+	*/
+	immr->im_clkrst.car_plprcr = immr->im_clkrst.car_plprcr;
 }
 
 /************************************************************************/