X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=cmd%2Fpci.c;h=0043471fc73e59cfb42e828936accaaa5c294f17;hb=9b2e892eb6e30913ee8ca95f1a360d61785d0912;hp=8094d3380fbd30284ab0438dc21dbea128980872;hpb=cd85bec36d0e0d16fedb00e0c434ed070a9c6b37;p=oweals%2Fu-boot.git

diff --git a/cmd/pci.c b/cmd/pci.c
index 8094d3380f..0043471fc7 100644
--- a/cmd/pci.c
+++ b/cmd/pci.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  * Andreas Heppel <aheppel@sysgo.de>
@@ -5,8 +6,6 @@
  * (C) Copyright 2002
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -92,6 +91,78 @@ static void pci_show_regs(pci_dev_t dev, struct pci_reg_info *regs)
 }
 #endif
 
+#ifdef CONFIG_DM_PCI
+int pci_bar_show(struct udevice *dev)
+{
+	u8 header_type;
+	int bar_cnt, bar_id, mem_type;
+	bool is_64, is_io;
+	u32 base_low, base_high;
+	u32 size_low, size_high;
+	u64 base, size;
+	u32 reg_addr;
+	int prefetchable;
+
+	dm_pci_read_config8(dev, PCI_HEADER_TYPE, &header_type);
+
+	if (header_type == PCI_HEADER_TYPE_CARDBUS) {
+		printf("CardBus doesn't support BARs\n");
+		return -ENOSYS;
+	}
+
+	bar_cnt = (header_type == PCI_HEADER_TYPE_NORMAL) ? 6 : 2;
+
+	printf("ID   Base                Size                Width  Type\n");
+	printf("----------------------------------------------------------\n");
+
+	bar_id = 0;
+	reg_addr = PCI_BASE_ADDRESS_0;
+	while (bar_cnt) {
+		dm_pci_read_config32(dev, reg_addr, &base_low);
+		dm_pci_write_config32(dev, reg_addr, 0xffffffff);
+		dm_pci_read_config32(dev, reg_addr, &size_low);
+		dm_pci_write_config32(dev, reg_addr, base_low);
+		reg_addr += 4;
+
+		base = base_low & ~0xf;
+		size = size_low & ~0xf;
+		base_high = 0x0;
+		size_high = 0xffffffff;
+		is_64 = 0;
+		prefetchable = base_low & PCI_BASE_ADDRESS_MEM_PREFETCH;
+		is_io = base_low & PCI_BASE_ADDRESS_SPACE_IO;
+		mem_type = base_low & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
+
+		if (mem_type == PCI_BASE_ADDRESS_MEM_TYPE_64) {
+			dm_pci_read_config32(dev, reg_addr, &base_high);
+			dm_pci_write_config32(dev, reg_addr, 0xffffffff);
+			dm_pci_read_config32(dev, reg_addr, &size_high);
+			dm_pci_write_config32(dev, reg_addr, base_high);
+			bar_cnt--;
+			reg_addr += 4;
+			is_64 = 1;
+		}
+
+		base = base | ((u64)base_high << 32);
+		size = size | ((u64)size_high << 32);
+
+		if ((!is_64 && size_low) || (is_64 && size)) {
+			size = ~size + 1;
+			printf(" %d   %#018llx  %#018llx  %d     %s   %s\n",
+			       bar_id, (unsigned long long)base,
+			       (unsigned long long)size, is_64 ? 64 : 32,
+			       is_io ? "I/O" : "MEM",
+			       prefetchable ? "Prefetchable" : "");
+		}
+
+		bar_id++;
+		bar_cnt--;
+	}
+
+	return 0;
+}
+#endif
+
 static struct pci_reg_info regs_start[] = {
 	{ "vendor ID", PCI_SIZE_16, PCI_VENDOR_ID },
 	{ "device ID", PCI_SIZE_16, PCI_DEVICE_ID },
@@ -535,6 +606,47 @@ static int pci_cfg_modify(pci_dev_t bdf, ulong addr, ulong size, ulong value,
 	return 0;
 }
 
+#ifdef CONFIG_DM_PCI
+static const struct pci_flag_info {
+	uint flag;
+	const char *name;
+} pci_flag_info[] = {
+	{ PCI_REGION_IO, "io" },
+	{ PCI_REGION_PREFETCH, "prefetch" },
+	{ PCI_REGION_SYS_MEMORY, "sysmem" },
+	{ PCI_REGION_RO, "readonly" },
+	{ PCI_REGION_IO, "io" },
+};
+
+static void pci_show_regions(struct udevice *bus)
+{
+	struct pci_controller *hose = dev_get_uclass_priv(bus);
+	const struct pci_region *reg;
+	int i, j;
+
+	if (!hose) {
+		printf("Bus '%s' is not a PCI controller\n", bus->name);
+		return;
+	}
+
+	printf("#   %-18s %-18s %-18s  %s\n", "Bus start", "Phys start", "Size",
+	       "Flags");
+	for (i = 0, reg = hose->regions; i < hose->region_count; i++, reg++) {
+		printf("%d   %#018llx %#018llx %#018llx  ", i,
+		       (unsigned long long)reg->bus_start,
+		       (unsigned long long)reg->phys_start,
+		       (unsigned long long)reg->size);
+		if (!(reg->flags & PCI_REGION_TYPE))
+			printf("mem ");
+		for (j = 0; j < ARRAY_SIZE(pci_flag_info); j++) {
+			if (reg->flags & pci_flag_info[j].flag)
+				printf("%s ", pci_flag_info[j].name);
+		}
+		printf("\n");
+	}
+}
+#endif
+
 /* PCI Configuration Space access commands
  *
  * Syntax:
@@ -573,19 +685,24 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		if (argc > 4)
 			value = simple_strtoul(argv[4], NULL, 16);
 	case 'h':		/* header */
+#ifdef CONFIG_DM_PCI
+	case 'b':		/* bars */
+#endif
 		if (argc < 3)
 			goto usage;
 		if ((bdf = get_pci_dev(argv[2])) == -1)
 			return 1;
 		break;
-#ifdef CONFIG_CMD_PCI_ENUM
+#if defined(CONFIG_DM_PCI)
 	case 'e':
-		break;
+		pci_init();
+		return 0;
 #endif
+	case 'r': /* no break */
 	default:		/* scan bus */
 		value = 1; /* short listing */
 		if (argc > 1) {
-			if (argv[argc-1][0] == 'l') {
+			if (cmd != 'r' && argv[argc-1][0] == 'l') {
 				value = 0;
 				argc--;
 			}
@@ -598,7 +715,10 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			printf("No such bus\n");
 			return CMD_RET_FAILURE;
 		}
-		pciinfo(bus, value);
+		if (cmd == 'r')
+			pci_show_regions(bus);
+		else
+			pciinfo(bus, value);
 #else
 		pciinfo(busnum, value);
 #endif
@@ -621,15 +741,6 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		break;
 	case 'd':		/* display */
 		return pci_cfg_display(dev, addr, size, value);
-#ifdef CONFIG_CMD_PCI_ENUM
-	case 'e':
-# ifdef CONFIG_DM_PCI
-		printf("This command is not yet supported with driver model\n");
-# else
-		pci_init();
-# endif
-		break;
-#endif
 	case 'n':		/* next */
 		if (argc < 4)
 			goto usage;
@@ -649,6 +760,11 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		ret = pci_cfg_write(dev, addr, size, value);
 #endif
 		break;
+#ifdef CONFIG_DM_PCI
+
+	case 'b':		/* bars */
+		return pci_bar_show(dev);
+#endif
 	default:
 		ret = CMD_RET_USAGE;
 		break;
@@ -665,12 +781,18 @@ static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 static char pci_help_text[] =
 	"[bus] [long]\n"
 	"    - short or long list of PCI devices on bus 'bus'\n"
-#ifdef CONFIG_CMD_PCI_ENUM
+#if defined(CONFIG_DM_PCI)
 	"pci enum\n"
-	"    - re-enumerate PCI buses\n"
+	"    - Enumerate PCI buses\n"
 #endif
 	"pci header b.d.f\n"
 	"    - show header of PCI device 'bus.device.function'\n"
+#ifdef CONFIG_DM_PCI
+	"pci bar b.d.f\n"
+	"    - show BARs base and size for device b.d.f'\n"
+	"pci regions\n"
+	"    - show PCI regions\n"
+#endif
 	"pci display[.b, .w, .l] b.d.f [address] [# of objects]\n"
 	"    - display PCI configuration space (CFG)\n"
 	"pci next[.b, .w, .l] b.d.f address\n"