X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=board%2Ffreescale%2Ft102xrdb%2Ft102xrdb.c;h=754fcb0ad55cd61493308cea80d18cd5b6e4d4e8;hb=09140113108541b95d340f3c7b6ee597d31ccc73;hp=acc0be07c5af530774b2cf9d5a0c5a942401a8bf;hpb=83d290c56fab2d38cd1ab4c4cc7099559c1d5046;p=oweals%2Fu-boot.git

diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index acc0be07c5..754fcb0ad5 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -1,11 +1,16 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
 #include <command.h>
+#include <env.h>
+#include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
+#include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
 #include <asm/mmu.h>
@@ -74,7 +79,7 @@ int checkboard(void)
 		printf("NOR vBank%d\n", reg);
 	}
 #elif defined(CONFIG_TARGET_T1023RDB)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	puts("NAND\n");
 #else
 	printf("NOR vBank%d\n", t1023rdb_ctrl(I2C_GET_BANK));
@@ -247,8 +252,69 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 {
 	ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
 	ccsr_gur_t __iomem  *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-	u32 val, orig_bus = i2c_get_bus_num();
+	u32 val;
 	u8 tmp;
+	int bus_num = I2C_PCA6408_BUS_NUM;
+
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_PCA6408_ADDR,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+	switch (ctrl_type) {
+	case GPIO1_SD_SEL:
+		val = in_be32(&pgpio->gpdat);
+		val |= GPIO1_SD_SEL;
+		out_be32(&pgpio->gpdat, val);
+		setbits_be32(&pgpio->gpdir, GPIO1_SD_SEL);
+		break;
+	case GPIO1_EMMC_SEL:
+		val = in_be32(&pgpio->gpdat);
+		val &= ~GPIO1_SD_SEL;
+		out_be32(&pgpio->gpdat, val);
+		setbits_be32(&pgpio->gpdir, GPIO1_SD_SEL);
+		break;
+	case GPIO3_GET_VERSION:
+		pgpio = (ccsr_gpio_t *)(CONFIG_SYS_MPC85xx_GPIO_ADDR
+			 + GPIO3_OFFSET);
+		val = in_be32(&pgpio->gpdat);
+		val = ((val & GPIO3_BRD_VER_MASK) >> 26) & 0x3;
+		if (val == 0x3) /* GPIO3_4/5 not used on RevB */
+			val = 0;
+		return val;
+	case I2C_GET_BANK:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		tmp &= 0x7;
+		tmp = ((tmp & 1) << 2) | (tmp & 2) | ((tmp & 4) >> 2);
+		return tmp;
+	case I2C_SET_BANK0:
+		tmp = 0x0;
+		dm_i2c_write(dev, 1, &tmp, 1);
+		tmp = 0xf8;
+		dm_i2c_write(dev, 3, &tmp, 1);
+		/* asserting HRESET_REQ */
+		out_be32(&gur->rstcr, 0x2);
+		break;
+	case I2C_SET_BANK4:
+		tmp = 0x1;
+		dm_i2c_write(dev, 1, &tmp, 1);
+		tmp = 0xf8;
+		dm_i2c_write(dev, 3, &tmp, 1);
+		out_be32(&gur->rstcr, 0x2);
+		break;
+	default:
+		break;
+	}
+#else
+	u32 orig_bus;
+
+	orig_bus = i2c_get_bus_num();
 
 	switch (ctrl_type) {
 	case GPIO1_SD_SEL:
@@ -272,14 +338,14 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 			val = 0;
 		return val;
 	case I2C_GET_BANK:
-		i2c_set_bus_num(I2C_PCA6408_BUS_NUM);
+		i2c_set_bus_num(bus_num);
 		i2c_read(I2C_PCA6408_ADDR, 0, 1, &tmp, 1);
 		tmp &= 0x7;
 		tmp = ((tmp & 1) << 2) | (tmp & 2) | ((tmp & 4) >> 2);
 		i2c_set_bus_num(orig_bus);
 		return tmp;
 	case I2C_SET_BANK0:
-		i2c_set_bus_num(I2C_PCA6408_BUS_NUM);
+		i2c_set_bus_num(bus_num);
 		tmp = 0x0;
 		i2c_write(I2C_PCA6408_ADDR, 1, 1, &tmp, 1);
 		tmp = 0xf8;
@@ -288,7 +354,7 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 		out_be32(&gur->rstcr, 0x2);
 		break;
 	case I2C_SET_BANK4:
-		i2c_set_bus_num(I2C_PCA6408_BUS_NUM);
+		i2c_set_bus_num(bus_num);
 		tmp = 0x1;
 		i2c_write(I2C_PCA6408_ADDR, 1, 1, &tmp, 1);
 		tmp = 0xf8;
@@ -298,11 +364,12 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 	default:
 		break;
 	}
+#endif
 	return 0;
 }
 
-static int switch_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
-		    char * const argv[])
+static int switch_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;