X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=arch%2Fsparc%2Finclude%2Fasm%2Firq.h;h=5d0f7564e9b8e8656b7b9c2ebb07ee89e28a1a9d;hb=ea3310e8aafad1da72d9a5e60568d725cbdefdbd;hp=bbe0204387258c516067d8d6f6b7b0816389ffea;hpb=8b485ba12b0defa0c4ed3559789250238f8331a8;p=oweals%2Fu-boot.git diff --git a/arch/sparc/include/asm/irq.h b/arch/sparc/include/asm/irq.h index bbe0204387..5d0f7564e9 100644 --- a/arch/sparc/include/asm/irq.h +++ b/arch/sparc/include/asm/irq.h @@ -12,7 +12,7 @@ #include /* Set SPARC Processor Interrupt Level */ -extern inline void set_pil(unsigned int level) +static inline void set_pil(unsigned int level) { unsigned int psr = get_psr(); @@ -20,7 +20,7 @@ extern inline void set_pil(unsigned int level) } /* Get SPARC Processor Interrupt Level */ -extern inline unsigned int get_pil(void) +static inline unsigned int get_pil(void) { unsigned int psr = get_psr(); return (psr & PSR_PIL) >> PSR_PIL_OFS; @@ -32,4 +32,7 @@ extern int intLock(void); /* Sets the PIL to oldLevel */ extern void intUnlock(int oldLevel); +/* Return non-zero if interrupts are currently enabled */ +extern int interrupt_is_enabled(void); + #endif