X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=sidebyside;f=arch%2Farm%2Fmach-rockchip%2FKconfig;h=282d728b82d580664bf8742db4040aec520fa8c1;hb=8b77ea90a7055f1da2931baca03d102dfa08aa36;hp=1e5a7bb79b528bbf5bd7acfdf5d00c701ed2c782;hpb=451dcf5cd002ee0e107989f849f9b4f56570f809;p=oweals%2Fu-boot.git

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 1e5a7bb79b..282d728b82 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -2,7 +2,7 @@ if ARCH_ROCKCHIP
 
 config ROCKCHIP_RK3036
 	bool "Support Rockchip RK3036"
-	select CPU_V7
+	select CPU_V7A
 	select SUPPORT_SPL
 	select SPL
 	imply USB_FUNCTION_ROCKUSB
@@ -15,7 +15,7 @@ config ROCKCHIP_RK3036
 
 config ROCKCHIP_RK3128
 	bool "Support Rockchip RK3128"
-	select CPU_V7
+	select CPU_V7A
 	help
 	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -24,12 +24,11 @@ config ROCKCHIP_RK3128
 
 config ROCKCHIP_RK3188
 	bool "Support Rockchip RK3188"
-	select CPU_V7
+	select CPU_V7A
 	select SPL_BOARD_INIT if SPL
 	select SUPPORT_SPL
 	select SPL
 	select SPL_CLK
-	select SPL_PINCTRL
 	select SPL_REGMAP
 	select SPL_SYSCON
 	select SPL_RAM
@@ -46,11 +45,10 @@ config ROCKCHIP_RK3188
 
 config ROCKCHIP_RK322X
 	bool "Support Rockchip RK3228/RK3229"
-	select CPU_V7
+	select CPU_V7A
 	select SUPPORT_SPL
 	select SPL
 	select ROCKCHIP_BROM_HELPER
-	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -59,7 +57,7 @@ config ROCKCHIP_RK322X
 
 config ROCKCHIP_RK3288
 	bool "Support Rockchip RK3288"
-	select CPU_V7
+	select CPU_V7A
 	select SPL_BOARD_INIT if SPL
 	select SUPPORT_SPL
 	select SPL
@@ -72,6 +70,16 @@ config ROCKCHIP_RK3288
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3288
+
+config TPL_TEXT_BASE
+	default 0xff704000
+
+config TPL_MAX_SIZE
+	default 32768
+
+endif
+
 config ROCKCHIP_RK3328
 	bool "Support Rockchip RK3328"
 	select ARM64
@@ -92,8 +100,6 @@ config ROCKCHIP_RK3368
 	imply SPL_SEPARATE_BSS
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
-	select DEBUG_UART_BOARD_INIT
-	select SYS_NS16550
 	help
 	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
 	  into a big and little cluster with 4 cores each) Cortex-A53 including
@@ -107,9 +113,6 @@ config ROCKCHIP_RK3368
 
 if ROCKCHIP_RK3368
 
-config TPL_LDSCRIPT
-	default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
-
 config TPL_TEXT_BASE
         default 0xff8c1000
 
@@ -129,7 +132,6 @@ config ROCKCHIP_RK3399
 	select SPL_SEPARATE_BSS
 	select SPL_SERIAL_SUPPORT
 	select SPL_DRIVERS_MISC_SUPPORT
-	select DEBUG_UART_BOARD_INIT
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
 	help
@@ -142,11 +144,19 @@ config ROCKCHIP_RK3399
 
 config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
-	select CPU_V7
+	select CPU_V7A
 	help
 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 	  and a DSP.
 
+config ROCKCHIP_USB_UART
+	bool "Route uart output to usb pins"
+	help
+	  Rockchip SoCs have the ability to route the signals of the debug
+	  uart through the d+ and d- pins of a specific usb phy to enable
+	  some form of closed-case debugging. With this option supported
+	  SoCs will enable this routing as a debug measure.
+
 config SPL_ROCKCHIP_BACK_TO_BROM
 	bool "SPL returns to bootrom"
 	default y if ROCKCHIP_RK3036
@@ -178,7 +188,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0x10300580 if ROCKCHIP_RV1108
 	default 0
 	help
-	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
+	  The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
 	  according to the value from this register.
 
 config ROCKCHIP_SPL_RESERVE_IRAM