X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=inline;f=drivers%2Fi2c%2Fimx_lpi2c.c;h=4586d4331fad9df171445aaf7248fdd1133d2152;hb=eb54682e91a0a3f9ca8629d67c5195ae54cfb1e9;hp=de74e89efdc0510e9a3e82154295906405da785e;hpb=1d12a7c8cd4e58d5c3989bc239d5fa9577079dfd;p=oweals%2Fu-boot.git diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c index de74e89efd..4586d4331f 100644 --- a/drivers/i2c/imx_lpi2c.c +++ b/drivers/i2c/imx_lpi2c.c @@ -1,7 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2016 Freescale Semiconductors, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -9,16 +8,18 @@ #include #include #include -#include +#include #include #include #include #include -DECLARE_GLOBAL_DATA_PTR; #define LPI2C_FIFO_SIZE 4 +#define LPI2C_NACK_TOUT_MS 1 #define LPI2C_TIMEOUT_MS 100 +static int bus_i2c_init(struct udevice *bus, int speed); + /* Weak linked function for overridden by some SoC power function */ int __weak init_i2c_power(unsigned i2c_num) { @@ -92,8 +93,9 @@ static int bus_i2c_wait_for_tx_ready(struct imx_lpi2c_reg *regs) return result; } -static int bus_i2c_send(struct imx_lpi2c_reg *regs, u8 *txbuf, int len) +static int bus_i2c_send(struct udevice *bus, u8 *txbuf, int len) { + struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus); lpi2c_status_t result = LPI2C_SUCESS; /* empty tx */ @@ -103,7 +105,7 @@ static int bus_i2c_send(struct imx_lpi2c_reg *regs, u8 *txbuf, int len) while (len--) { result = bus_i2c_wait_for_tx_ready(regs); if (result) { - debug("i2c: send wait fot tx ready: %d\n", result); + debug("i2c: send wait for tx ready: %d\n", result); return result; } writel(*txbuf++, ®s->mtdr); @@ -112,8 +114,9 @@ static int bus_i2c_send(struct imx_lpi2c_reg *regs, u8 *txbuf, int len) return result; } -static int bus_i2c_receive(struct imx_lpi2c_reg *regs, u8 *rxbuf, int len) +static int bus_i2c_receive(struct udevice *bus, u8 *rxbuf, int len) { + struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus); lpi2c_status_t result = LPI2C_SUCESS; u32 val; ulong start_time = get_timer(0); @@ -154,15 +157,24 @@ static int bus_i2c_receive(struct imx_lpi2c_reg *regs, u8 *rxbuf, int len) return result; } -static int bus_i2c_start(struct imx_lpi2c_reg *regs, u8 addr, u8 dir) +static int bus_i2c_start(struct udevice *bus, u8 addr, u8 dir) { - lpi2c_status_t result = LPI2C_SUCESS; + lpi2c_status_t result; + struct imx_lpi2c_reg *regs = + (struct imx_lpi2c_reg *)devfdt_get_addr(bus); u32 val; result = imx_lpci2c_check_busy_bus(regs); if (result) { debug("i2c: start check busy bus: 0x%x\n", result); - return result; + + /* Try to init the lpi2c then check the bus busy again */ + bus_i2c_init(bus, 100000); + result = imx_lpci2c_check_busy_bus(regs); + if (result) { + printf("i2c: Error check busy bus: 0x%x\n", result); + return result; + } } /* clear all status flags */ writel(0x7f00, ®s->msr); @@ -182,10 +194,13 @@ static int bus_i2c_start(struct imx_lpi2c_reg *regs, u8 addr, u8 dir) return result; } -static int bus_i2c_stop(struct imx_lpi2c_reg *regs) +static int bus_i2c_stop(struct udevice *bus) { - lpi2c_status_t result = LPI2C_SUCESS; + lpi2c_status_t result; + struct imx_lpi2c_reg *regs = + (struct imx_lpi2c_reg *)devfdt_get_addr(bus); u32 status; + ulong start_time; result = bus_i2c_wait_for_tx_ready(regs); if (result) { @@ -196,7 +211,8 @@ static int bus_i2c_stop(struct imx_lpi2c_reg *regs) /* send stop command */ writel(LPI2C_MTDR_CMD(0x2), ®s->mtdr); - while (result == LPI2C_SUCESS) { + start_time = get_timer(0); + while (1) { status = readl(®s->msr); result = imx_lpci2c_check_clear_error(regs); /* stop detect flag */ @@ -206,39 +222,38 @@ static int bus_i2c_stop(struct imx_lpi2c_reg *regs) writel(status, ®s->msr); break; } + + if (get_timer(start_time) > LPI2C_NACK_TOUT_MS) { + debug("stop timeout\n"); + return -ETIMEDOUT; + } } return result; } -static int bus_i2c_read(struct imx_lpi2c_reg *regs, u32 chip, u8 *buf, int len) +static int bus_i2c_read(struct udevice *bus, u32 chip, u8 *buf, int len) { - lpi2c_status_t result = LPI2C_SUCESS; + lpi2c_status_t result; - result = bus_i2c_start(regs, chip, 1); - if (result) - return result; - result = bus_i2c_receive(regs, buf, len); + result = bus_i2c_start(bus, chip, 1); if (result) return result; - result = bus_i2c_stop(regs); + result = bus_i2c_receive(bus, buf, len); if (result) return result; return result; } -static int bus_i2c_write(struct imx_lpi2c_reg *regs, u32 chip, u8 *buf, int len) +static int bus_i2c_write(struct udevice *bus, u32 chip, u8 *buf, int len) { - lpi2c_status_t result = LPI2C_SUCESS; + lpi2c_status_t result; - result = bus_i2c_start(regs, chip, 0); - if (result) - return result; - result = bus_i2c_send(regs, buf, len); + result = bus_i2c_start(bus, chip, 0); if (result) return result; - result = bus_i2c_stop(regs); + result = bus_i2c_send(bus, buf, len); if (result) return result; @@ -246,8 +261,14 @@ static int bus_i2c_write(struct imx_lpi2c_reg *regs, u32 chip, u8 *buf, int len) } +u32 __weak imx_get_i2cclk(u32 i2c_num) +{ + return 0; +} + static int bus_i2c_set_bus_speed(struct udevice *bus, int speed) { + struct imx_lpi2c_bus *i2c_bus = dev_get_priv(bus); struct imx_lpi2c_reg *regs; u32 val; u32 preescale = 0, best_pre = 0, clkhi = 0; @@ -258,9 +279,18 @@ static int bus_i2c_set_bus_speed(struct udevice *bus, int speed) int i; regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus); - clock_rate = imx_get_i2cclk(bus->seq); - if (!clock_rate) - return -EPERM; + + if (IS_ENABLED(CONFIG_CLK)) { + clock_rate = clk_get_rate(&i2c_bus->per_clk); + if (clock_rate <= 0) { + dev_err(bus, "Failed to get i2c clk: %d\n", clock_rate); + return clock_rate; + } + } else { + clock_rate = imx_get_i2cclk(bus->seq); + if (!clock_rate) + return -EPERM; + } mode = (readl(®s->mcr) & LPI2C_MCR_MEN_MASK) >> LPI2C_MCR_MEN_SHIFT; /* disable master mode */ @@ -353,38 +383,32 @@ static int bus_i2c_init(struct udevice *bus, int speed) static int imx_lpi2c_probe_chip(struct udevice *bus, u32 chip, u32 chip_flags) { - struct imx_lpi2c_reg *regs; - lpi2c_status_t result = LPI2C_SUCESS; + lpi2c_status_t result; - regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus); - result = bus_i2c_start(regs, chip, 0); + result = bus_i2c_start(bus, chip, 0); if (result) { - bus_i2c_stop(regs); + bus_i2c_stop(bus); bus_i2c_init(bus, 100000); return result; } - result = bus_i2c_stop(regs); - if (result) { + result = bus_i2c_stop(bus); + if (result) bus_i2c_init(bus, 100000); - return -result; - } return result; } static int imx_lpi2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) { - struct imx_lpi2c_reg *regs; - int ret = 0; + int ret = 0, ret_stop; - regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus); for (; nmsgs > 0; nmsgs--, msg++) { debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); if (msg->flags & I2C_M_RD) - ret = bus_i2c_read(regs, msg->addr, msg->buf, msg->len); + ret = bus_i2c_read(bus, msg->addr, msg->buf, msg->len); else { - ret = bus_i2c_write(regs, msg->addr, msg->buf, + ret = bus_i2c_write(bus, msg->addr, msg->buf, msg->len); if (ret) break; @@ -394,6 +418,12 @@ static int imx_lpi2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) if (ret) debug("i2c_write: error sending\n"); + ret_stop = bus_i2c_stop(bus); + if (ret_stop) + debug("i2c_xfer: stop bus error\n"); + + ret |= ret_stop; + return ret; } @@ -402,6 +432,11 @@ static int imx_lpi2c_set_bus_speed(struct udevice *bus, unsigned int speed) return bus_i2c_set_bus_speed(bus, speed); } +__weak int enable_i2c_clk(unsigned char enable, unsigned int i2c_num) +{ + return 0; +} + static int imx_lpi2c_probe(struct udevice *bus) { struct imx_lpi2c_bus *i2c_bus = dev_get_priv(bus); @@ -425,16 +460,29 @@ static int imx_lpi2c_probe(struct udevice *bus) return ret; } - /* To i.MX7ULP, only i2c4-7 can be handled by A7 core */ - ret = enable_i2c_clk(1, bus->seq); - if (ret < 0) - return ret; + if (IS_ENABLED(CONFIG_CLK)) { + ret = clk_get_by_name(bus, "per", &i2c_bus->per_clk); + if (ret) { + dev_err(bus, "Failed to get per clk\n"); + return ret; + } + ret = clk_enable(&i2c_bus->per_clk); + if (ret) { + dev_err(bus, "Failed to enable per clk\n"); + return ret; + } + } else { + /* To i.MX7ULP, only i2c4-7 can be handled by A7 core */ + ret = enable_i2c_clk(1, bus->seq); + if (ret < 0) + return ret; + } ret = bus_i2c_init(bus, 100000); if (ret < 0) return ret; - debug("i2c : controller bus %d at %lu , speed %d: ", + debug("i2c : controller bus %d at 0x%lx , speed %d: ", bus->seq, i2c_bus->base, i2c_bus->speed); @@ -449,6 +497,7 @@ static const struct dm_i2c_ops imx_lpi2c_ops = { static const struct udevice_id imx_lpi2c_ids[] = { { .compatible = "fsl,imx7ulp-lpi2c", }, + { .compatible = "fsl,imx8qm-lpi2c", }, {} };