X-Git-Url: https://git.librecmc.org/?a=blobdiff_plain;ds=inline;f=arch%2Farm%2Fdts%2Fzynq-zc702.dts;h=d10695740fa9ec58e14cd70d6cb46813fb59802e;hb=955de5111112fb72f08b4c1914429c703138a6ab;hp=2696e70a89a776e5d2dc7712df605e99ae10c1b1;hpb=f253f2933b7373556329c0174dd5b101039a4056;p=oweals%2Fu-boot.git diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 2696e70a89..d10695740f 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -1,16 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ /* - * Xilinx ZC702 board DTS - * * Copyright (C) 2011 - 2015 Xilinx * Copyright (C) 2012 National Instruments Corp. - * - * SPDX-License-Identifier: GPL-2.0+ */ /dts-v1/; #include "zynq-7000.dtsi" / { - model = "Zynq ZC702 Development Board"; + model = "Xilinx ZC702 board"; compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; aliases { @@ -19,6 +16,7 @@ serial0 = &uart1; spi0 = &qspi; mmc0 = &sdhci0; + usb0 = &usb0; }; memory@0 { @@ -33,8 +31,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; autorepeat; sw14 { label = "sw14"; @@ -96,6 +92,7 @@ ethernet_phy: ethernet-phy@7 { reg = <7>; + device_type = "ethernet-phy"; }; }; @@ -107,10 +104,13 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio0 50 0>; + sda-gpios = <&gpio0 51 0>; - i2cswitch@74 { + i2c-mux@74 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -150,7 +150,7 @@ #size-cells = <0>; reg = <2>; eeprom@54 { - compatible = "at,24c08"; + compatible = "atmel,24c08"; reg = <0x54>; }; }; @@ -299,6 +299,19 @@ }; }; + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_50_grp", "gpio0_51_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_50_grp", "gpio0_51_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + }; + pinctrl_sdhci0_default: sdhci0-default { mux { groups = "sdio0_2_grp";