// WASP BootStrap Register
#define WASP_BOOTSTRAP_REG (AR7240_RESET_BASE + 0xb0)
+#define WASP_BOOTSTRAP_SDRAM_DISABLE_SHIFT 1
+#define WASP_BOOTSTRAP_SDRAM_DISABLE_MASK (1 << WASP_BOOTSTRAP_SDRAM_DISABLE_SHIFT)
+#define WASP_BOOTSTRAP_DDR_SELECT_SHIFT 0
+#define WASP_BOOTSTRAP_DDR_SELECT_MASK (1 << WASP_BOOTSTRAP_DDR_SELECT_SHIFT)
+#define WASP_BOOTSTRAP_DDR_WIDTH_SHIFT 21
+#define WASP_BOOTSTRAP_DDR_WIDTH_MASK (1 << WASP_BOOTSTRAP_DDR_WIDTH_SHIFT)
#define WASP_REF_CLK_25 (1 << 4) /* 0 - 25MHz 1 - 40 MHz */
#define WASP_RAM_TYPE(a) ((a) & 0x3)