Be consistent with register names in common QC/A header

[oweals/u-boot_mod.git] / u-boot / cpu / mips / ar7240 / ar933x_pll_init.S

diff --git a/u-boot/cpu/mips/ar7240/ar933x_pll_init.S b/u-boot/cpu/mips/ar7240/ar933x_pll_init.S
index 1bf0e6b1cafc87020049c14c864605149598b351..442f957426298c53023f0a8ba21556e4909830c1 100644 (file)
--- a/u-boot/cpu/mips/ar7240/ar933x_pll_init.S
+++ b/u-boot/cpu/mips/ar7240/ar933x_pll_init.S
@@ -64,7 +64,7 @@ set_xtal_40mhz:
  * Several WLAN module resets as in Atheros (Q)SDK
  */
 wlan_rst_init:
-       li  t8, QCA_RST_RST_REG
+       li  t8, QCA_RST_RESET_REG
 
        /* 2x WLAN resets */
        lw  t9, 0(t8)
@@ -90,7 +90,7 @@ wlan_rst_init:
        nop
 
 wlan_rst:
-       li  t8, QCA_RST_RST_REG
+       li  t8, QCA_RST_RESET_REG
 
        lw  t9, 0(t8)
        or  t9, t9, QCA_RST_RESET_WLAN_RST_MASK