#include <version.h>
#include "ar7240_soc.h"
-#ifndef COMPRESSED_UBOOT
-extern void ar7240_ddr_initial_config(uint32_t refresh);
+#if !defined(COMPRESSED_UBOOT)
+extern void hornet_ddr_init(void);
#endif
+
extern int ar7240_ddr_find_size(void);
extern void hornet_ddr_tap_init(void);
gpio ^= 1 << GPIO_SYS_LED_BIT;
#elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
gpio ^= 1 << GPIO_INTERNET_LED_BIT;
-#elif defined(CONFIG_FOR_TPLINK_MR10U_V1)
+#elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
gpio ^= 1 << GPIO_SYS_LED_BIT;
#elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
gpio ^= 1 << GPIO_SYS_LED_BIT;
+#elif defined(CONFIG_FOR_DLINK_DIR505_A1)
+ gpio ^= 1 << GPIO_SYS_LED_BIT;
+#elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
+ gpio ^= 1 << GPIO_SYS_LED_BIT;
#elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
gpio ^= 1 << GPIO_WLAN_LED_BIT;
+#elif defined(CONFIG_FOR_DRAGINO_V2) || defined(CONFIG_FOR_MESH_POTATO_V2)
+ gpio ^= 1 << GPIO_WLAN_LED_BIT;
+#elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
+ gpio ^= 1 << GPIO_SYS_LED_BIT;
+#elif defined(CONFIG_FOR_GL_INET)
+ gpio ^= 1 << GPIO_WLAN_LED_BIT;
#else
#error "Custom GPIO in leg_toggle() not defined!"
#endif
SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
SETBITVAL(gpio, GPIO_ETH_LED_BIT, GPIO_ETH_LED_ON);
-#elif defined(CONFIG_FOR_TPLINK_MR10U_V1)
+#elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
#elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
#ifdef CONFIG_FOR_TPLINK_MR3220_V2
SETBITVAL(gpio, GPIO_USB_LED_BIT, GPIO_USB_LED_ON);
#endif
+#elif defined(CONFIG_FOR_DLINK_DIR505_A1)
+ SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
+#elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
+ SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
+ SETBITVAL(gpio, GPIO_WAN_LED_BIT, GPIO_WAN_LED_ON);
+ SETBITVAL(gpio, GPIO_LAN1_LED_BIT, GPIO_LAN1_LED_ON);
+ SETBITVAL(gpio, GPIO_LAN2_LED_BIT, GPIO_LAN2_LED_ON);
#elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
+#elif defined(CONFIG_FOR_DRAGINO_V2) || defined(CONFIG_FOR_MESH_POTATO_V2)
+ SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
+ SETBITVAL(gpio, GPIO_WAN_LED_BIT, GPIO_WAN_LED_ON);
+ SETBITVAL(gpio, GPIO_LAN_LED_BIT, GPIO_LAN_LED_ON);
+ SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, GPIO_INTERNET_LED_ON);
+#elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
+ SETBITVAL(gpio, GPIO_SYS_LED_BIT, GPIO_SYS_LED_ON);
+#elif defined(CONFIG_FOR_GL_INET)
+ SETBITVAL(gpio, GPIO_WLAN_LED_BIT, GPIO_WLAN_LED_ON);
+ SETBITVAL(gpio, GPIO_LAN_LED_BIT, GPIO_LAN_LED_ON);
#else
#error "Custom GPIO in all_led_on() not defined!"
#endif
SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
SETBITVAL(gpio, GPIO_ETH_LED_BIT, !GPIO_ETH_LED_ON);
-#elif defined(CONFIG_FOR_TPLINK_MR10U_V1)
+#elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
#elif defined(CONFIG_FOR_TPLINK_WR740N_V4) || defined(CONFIG_FOR_TPLINK_MR3220_V2)
SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
#ifdef CONFIG_FOR_TPLINK_MR3220_V2
SETBITVAL(gpio, GPIO_USB_LED_BIT, !GPIO_USB_LED_ON);
#endif
+#elif defined(CONFIG_FOR_DLINK_DIR505_A1)
+ SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
+#elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
+ SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
+ SETBITVAL(gpio, GPIO_WAN_LED_BIT, !GPIO_WAN_LED_ON);
+ SETBITVAL(gpio, GPIO_LAN1_LED_BIT, !GPIO_LAN1_LED_ON);
+ SETBITVAL(gpio, GPIO_LAN2_LED_BIT, !GPIO_LAN2_LED_ON);
#elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
+#elif defined(CONFIG_FOR_DRAGINO_V2) || defined(CONFIG_FOR_MESH_POTATO_V2)
+ SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
+ SETBITVAL(gpio, GPIO_WAN_LED_BIT, !GPIO_WAN_LED_ON);
+ SETBITVAL(gpio, GPIO_LAN_LED_BIT, !GPIO_LAN_LED_ON);
+ SETBITVAL(gpio, GPIO_INTERNET_LED_BIT, !GPIO_INTERNET_LED_ON);
+#elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
+ SETBITVAL(gpio, GPIO_SYS_LED_BIT, !GPIO_SYS_LED_ON);
+#elif defined(CONFIG_FOR_GL_INET)
+ SETBITVAL(gpio, GPIO_WLAN_LED_BIT, !GPIO_WLAN_LED_ON);
+ SETBITVAL(gpio, GPIO_LAN_LED_BIT, !GPIO_LAN_LED_ON);
#else
#error "Custom GPIO in all_led_off() not defined!"
#endif
#error "GPIO_RST_BUTTON_BIT not defined!"
#endif
int reset_button_status(void){
- if(ar7240_reg_rd(AR7240_GPIO_IN) & (1 << GPIO_RST_BUTTON_BIT)){
-#if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
+ unsigned int gpio;
+
+ gpio = ar7240_reg_rd(AR7240_GPIO_IN);
+
+ if(gpio & (1 << GPIO_RST_BUTTON_BIT)){
+#if defined(GPIO_RST_BUTTON_IS_ACTIVE_LOW)
return(0);
#else
return(1);
#endif
} else {
-#if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
+#if defined(GPIO_RST_BUTTON_IS_ACTIVE_LOW)
return(1);
#else
return(0);
ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xEF84E0FB));
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
/* Disable EJTAG functionality to enable GPIO functionality */
ar7240_reg_wr(AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) | 0x8001));
+#endif
/* Set HORNET_BOOTSTRAP_STATUS BIT18 to ensure that software can control GPIO26 and GPIO27 */
ar7240_reg_wr(HORNET_BOOTSTRAP_STATUS, (ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS) | (0x1<<18)));
/* Disable clock obs, added by zcf, 20110509 */
//ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
-#elif defined(CONFIG_FOR_TPLINK_MR10U_V1)
+#elif defined(CONFIG_FOR_TPLINK_MR10U_V1) || defined(CONFIG_FOR_TPLINK_MR13U_V1)
- /* LED's GPIOs on MR10U:
+ /* LED's GPIOs on MR10U/MR13U:
*
* 27 => SYS
*
//ar7240_reg_wr (AR7240_GPIO_FUNC, (ar7240_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e07f));
#elif defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
// TODO: check GPIO config for C2
+#elif defined(CONFIG_FOR_DRAGINO_V2) || defined(CONFIG_FOR_MESH_POTATO_V2)
+
+ /* LED's GPIOs on MR3220v2:
+ *
+ * 0 => WLAN
+ * 13 => LAN
+ * 17 => WAN
+ * 28 => INTERNET
+ *
+ */
+
+ /* set GPIO_OE */
+ ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x10022001));
+
+#elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
+
+ /* LED's GPIOs on Black Swift board:
+ *
+ * 27 => SYS LED (red) - output
+ * 13-17=> output only (see AR9331 datasheet)
+ * 11 => Reset switch (active low) - in (like all other by default)
+ *
+ */
+
+ // set GPIO_OE
+ ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x0803E000));
+
+ // turn off all
+ ar7240_reg_wr(AR7240_GPIO_SET, 0x0);
+
+#elif defined(CONFIG_FOR_DLINK_DIR505_A1)
+
+ /* LED's GPIOs on DIR-505:
+ *
+ * 26 => RED LED
+ * 27 => GREEN LED
+ *
+ */
+
+ // set GPIO_OE
+ ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xC000000));
+
+ // turn off RED LED, we don't need it
+ ar7240_reg_wr(AR7240_GPIO_OUT, (ar7240_reg_rd(AR7240_GPIO_OUT) | (0x1 << 26)));
+#elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
+
+ /* LED's GPIOs on GS-Oolite v1 with development board:
+ *
+ * 13 => LAN2
+ * 15 => LAN1
+ * 17 => WAN
+ * 27 => SYS LED (green on dev board, red on module)
+ *
+ * I/O on development board:
+ * 0 => RED LED (active low)
+ * 1 => RED LED (active low)
+ * 6 => Switch 8
+ * 7 => Switch 7
+ * 8 => USB power
+ * 11 => Reset switch
+ * 14 => RED LED (active low)
+ * 16 => RED LED (active low)
+ * 18 => RED LED (active low)
+ * 19 => RED LED (active low)
+ * 20 => RED LED (active low)
+ * 21 => RED LED (active low)
+ * 22 => RED LED (active low)
+ * 23 => Relay 1
+ * 24 => Relay 2
+ * 26 => RED LED (active low)
+ *
+ */
+
+ // set GPIO_OE
+ ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0xDFFE103));
+
+ // turn on power on USB and turn off RED LEDs
+ ar7240_reg_wr(AR7240_GPIO_SET, 0x47D4103);
+#elif defined(CONFIG_FOR_GL_INET)
+
+ /* LED's GPIOs on GL.iNet:
+ *
+ * 0 => WLAN
+ * 13 => LAN
+ *
+ */
+
+ /* set GPIO_OE */
+ ar7240_reg_wr(AR7240_GPIO_OE, (ar7240_reg_rd(AR7240_GPIO_OE) | 0x2001));
+
#else
#error "Custom GPIO config in gpio_config() not defined!"
#endif
}
int ar7240_mem_config(void){
-#ifndef COMPRESSED_UBOOT
- ar7240_ddr_initial_config(CFG_DDR_REFRESH_VAL);
-#endif
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+ #ifndef COMPRESSED_UBOOT
+ hornet_ddr_init();
+ #endif
/* Default tap values for starting the tap_init*/
ar7240_reg_wr(AR7240_DDR_TAP_CONTROL0, CFG_DDR_TAP0_VAL);
ar7240_reg_wr(AR7240_DDR_TAP_CONTROL1, CFG_DDR_TAP1_VAL);
+#endif
gpio_config();
all_led_off();
-#ifndef COMPRESSED_UBOOT
- ar7240_ddr_tap_init();
-#else
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
hornet_ddr_tap_init();
#endif
return(0);
}
#endif
+
+/*
+ * Returns a string with memory type preceded by a space sign
+ */
+const char* print_mem_type(void){
+/*
+ * WR720N v3 (CH version) has wrong bootstrap configuration,
+ * so the memory type cannot be recognized automatically
+ */
+#if defined(CONFIG_FOR_TPLINK_WR720N_V3)
+ return " DDR 16-bit";
+#else
+ unsigned int reg_val;
+
+ reg_val = (ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS) & HORNET_BOOTSTRAP_MEM_TYPE_MASK) >> HORNET_BOOTSTRAP_MEM_TYPE_SHIFT;
+
+ switch(reg_val){
+ case 0:
+ return " SDRAM";
+ break;
+
+ case 1:
+ return " DDR 16-bit";
+ break;
+
+ case 2:
+ return " DDR2 16-bit";
+ break;
+
+ default:
+ return "";
+ break;
+ }
+#endif /* defined(CONFIG_FOR_TPLINK_WR720N_V3) */
+}