palmbus@1E000000 {
compatible = "palmbus";
reg = <0x1E000000 0x100000>;
- ranges = <0x0 0x1E000000 0x0FFFFF>;
+ ranges = <0x0 0x1E000000 0x0FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <1>;
reg = <0 0>;
spi-max-frequency = <10000000>;
- m25p,chunked-io;
+ m25p,chunked-io = <32>;
};
};
};
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
+
state_default: pinctrl0 {
};
+
spi_pins: spi {
spi {
ralink,group = "spi";
ralink,function = "spi";
};
};
+
i2c_pins: i2c {
i2c {
- lantiq,group = "i2c";
- lantiq,function = "i2c";
+ ralink,group = "i2c";
+ ralink,function = "i2c";
};
};
+
uart1_pins: uart1 {
uart1 {
ralink,group = "uart1";
ralink,function = "uart";
};
};
+
uart2_pins: uart2 {
uart2 {
ralink,group = "uart2";
ralink,function = "uart";
};
};
+
uart3_pins: uart3 {
uart3 {
ralink,group = "uart3";
ralink,function = "uart";
};
};
+
rgmii1_pins: rgmii1 {
rgmii1 {
ralink,group = "rgmii1";
ralink,function = "rgmii";
};
};
+
rgmii2_pins: rgmii2 {
rgmii2 {
ralink,group = "rgmii2";
ralink,function = "rgmii";
};
};
+
mdio_pins: mdio {
mdio {
ralink,group = "mdio";
ralink,function = "mdio";
};
};
+
pcie_pins: pcie {
pcie {
ralink,group = "pcie";
ralink,function = "pcie rst";
};
};
+
nand_pins: nand {
spi-nand {
ralink,group = "spi";
ralink,function = "nand";
};
+
sdhci-nand {
ralink,group = "sdhci";
ralink,function = "nand";
};
};
+
sdhci_pins: sdhci {
sdhci {
ralink,group = "sdhci";
};
xhci@1E1C0000 {
+ status = "disabled";
+
compatible = "xhci-platform";
reg = <0x1E1C0000 4000>;
label = "uboot";
reg = <0x00000 0x80000>; /* 64 KB */
};
+
partition@80000 {
label = "uboot_env";
reg = <0x80000 0x80000>; /* 64 KB */
};
+
partition@100000 {
label = "factory";
reg = <0x100000 0x40000>;
};
+
partition@140000 {
label = "rootfs";
reg = <0x140000 0xec0000>;
#address-cells = <1>;
#size-cells = <0>;
+ resets = <&rstctrl 6 &rstctrl 23>;
+ reset-names = "fe", "eth";
+
interrupt-parent = <&gic>;
interrupts = <3>;
compatible = "ralink,mt7620a-gsw";
reg = <0x1e110000 8000>;
interrupt-parent = <&gic>;
- interrupts = <23>;
+ interrupts = <23>;
+ };
+
+ pcie@1e140000 {
+ compatible = "mediatek,mt7621-pci";
+ reg = <0x1e140000 0x100
+ 0x1e142000 0x100>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pins>;
+
+ device_type = "pci";
+
+ bus-range = <0 255>;
+ ranges = <
+ 0x02000000 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */
+ 0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
+ >;
+
+ status = "okay";
+
+ pcie0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ device_type = "pci";
+ };
+
+ pcie1 {
+ reg = <0x0800 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ device_type = "pci";
+ };
+
+ pcie2 {
+ reg = <0x1000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ device_type = "pci";
+ };
};
};