kernel: Bump to 4.14.260

[librecmc/librecmc.git] / target / linux / mvebu / patches-4.14 / 527-PCI-aardvark-allow-to-specify-link-capability.patch

diff --git a/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch b/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch
deleted file mode 100644 (file)
index 3360123..0000000
--- a/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From f70b629e488cc3f2a325ac35476f4f7ae502c5d0 Mon Sep 17 00:00:00 2001
-From: Tomasz Maciej Nowak <tmn505@gmail.com>
-Date: Thu, 14 Jun 2018 14:24:40 +0200
-Subject: [PATCH 1/2] PCI: aardvark: allow to specify link capability
-
-Use DT of_pci_get_max_link_speed() facility to allow specifying link
-capability. If none or unspecified value is given it falls back to gen2,
-which is default for Armada 3700 SoC.
-
-Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
----
- drivers/pci/host/pci-aardvark.c | 11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
---- a/drivers/pci/host/pci-aardvark.c
-+++ b/drivers/pci/host/pci-aardvark.c
-@@ -275,6 +275,8 @@ static void advk_pcie_set_ob_win(struct
- 
- static void advk_pcie_setup_hw(struct advk_pcie *pcie)
- {
-+      struct device *dev = &pcie->pdev->dev;
-+      struct device_node *node = dev->of_node;
-       u32 reg;
-       int i;
- 
-@@ -314,10 +316,15 @@ static void advk_pcie_setup_hw(struct ad
-               PCIE_CORE_CTRL2_TD_ENABLE;
-       advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
- 
--      /* Set GEN2 */
-+      /* Set GEN */
-       reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
-       reg &= ~PCIE_GEN_SEL_MSK;
--      reg |= SPEED_GEN_2;
-+      if (of_pci_get_max_link_speed(node) == 1)
-+              reg |= SPEED_GEN_1;
-+      else if (of_pci_get_max_link_speed(node) == 3)
-+              reg |= SPEED_GEN_3;
-+      else
-+              reg |= SPEED_GEN_2;
-       advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
- 
-       /* Set lane X1 */