#reset-cells = <1>;
};
+
+ hs_uart: uart@18500000 {
+ compatible = "qca,ar9330-uart";
+ reg = <0x18500000 0x14>;
+
+ interrupts = <6>;
+ interrupt-parent = <&miscintc>;
+
+ clocks = <&pll ATH79_CLK_UART1>;
+ clock-names = "uart";
+
+ status = "disabled";
+ };
};
nand: nand@1b000200 {
};
spi: spi@1f000000 {
- compatible = "qca,ar9340-spi", "qca,ar7100-spi";
+ compatible = "qca,ar934x-spi";
reg = <0x1f000000 0x1c>;
clocks = <&pll ATH79_CLK_AHB>;
- clock-names = "ahb";
#address-cells = <1>;
#size-cells = <0>;
pll-handle = <&pll>;
resets = <&rst 9>, <&rst 22>;
reset-names = "mac", "mdio";
+ clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+ clock-names = "eth", "mdio";
};
&mdio1 {
ð1 {
compatible = "qca,ar9340-eth", "syscon";
- resets = <&rst 13>;
- reset-names = "mac";
+ resets = <&rst 13>, <&rst 23>;
+ reset-names = "mac", "mdio";
+ clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+ clock-names = "eth", "mdio";
phy-mode = "gmii";
fixed-link {