#define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000)
#define AR71XX_UART_SIZE 0x100
#define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)
-@@ -218,6 +218,9 @@
+@@ -229,6 +229,9 @@
#define QCA953X_DDR_REG_FLUSH_PCIE 0xa8
#define QCA953X_DDR_REG_FLUSH_WMAC 0xac
*/
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
-@@ -171,6 +171,27 @@ static void qca953x_wmac_setup(void)
+@@ -170,6 +170,27 @@ static void qca953x_wmac_setup(void)
ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision;
}
static void qca955x_wmac_setup(void)
{
u32 t;
-@@ -187,6 +208,8 @@ static void qca955x_wmac_setup(void)
+@@ -186,6 +207,8 @@ static void qca955x_wmac_setup(void)
ath79_wmac_data.is_clk_25mhz = false;
else
ath79_wmac_data.is_clk_25mhz = true;
+ ath79_wmac_data.external_reset = ar955x_wmac_reset;
}
- static void qca956x_wmac_setup(void)
+ #define AR93XX_WMAC_SIZE \
--- a/arch/mips/ath79/common.h
+++ b/arch/mips/ath79/common.h
@@ -19,6 +19,8 @@