kernel: bump 4.4 to 4.4.91

[oweals/openwrt.git] / target / linux / ar71xx / patches-4.4 / 622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch

diff --git a/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch
index dff354398cd2ab6556b13be9f7ce45f4d7f311e8..cab2f6f9cbace8c4afa4435e3521db281f1ffc75 100644 (file)
--- a/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch
+++ b/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch
@@ -11,7 +11,7 @@
  #define QCA956X_GMAC_BASE     (AR71XX_APB_BASE + 0x00070000)
  #define QCA956X_GMAC_SIZE     0x64
  
-@@ -404,6 +408,7 @@
+@@ -414,6 +418,7 @@
  #define QCA956X_PLL_DDR_CONFIG_REG                    0x08
  #define QCA956X_PLL_DDR_CONFIG1_REG                   0x0c
  #define QCA956X_PLL_CLK_CTRL_REG                      0x10
@@ -19,7 +19,7 @@
  
  #define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT           12
  #define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK            0x1f
-@@ -1186,4 +1191,16 @@
+@@ -1196,4 +1201,16 @@
  #define QCA955X_ETH_CFG_TXE_DELAY_MASK        0x3
  #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT       20