}
};
+static const struct ar8327_led_info tl_wr1041n_leds_ar8327[] = {
+ AR8327_LED_INFO(PHY0_0, HW, "tp-link:green:wan"),
+ AR8327_LED_INFO(PHY1_0, HW, "tp-link:green:lan1"),
+ AR8327_LED_INFO(PHY2_0, HW, "tp-link:green:lan2"),
+ AR8327_LED_INFO(PHY3_0, HW, "tp-link:green:lan3"),
+ AR8327_LED_INFO(PHY4_0, HW, "tp-link:green:lan4"),
+};
+
+static struct ar8327_led_cfg wr1041n_v2_ar8327_led_cfg = {
+ .led_ctrl0 = 0xcf35cf35, /* LED0: blink at 10/100/1000M */
+ .led_ctrl1 = 0xcf35cf35, /* LED1: blink at 10/100/1000M: anyway, no LED1 on tl-wr1041n */
+ .led_ctrl2 = 0xcf35cf35, /* LED2: blink at 10/100/1000M: anyway, no LED2 on tl-wr1041n */
+ .led_ctrl3 = 0x03ffff00, /* Pattern enabled for LED 0-2 of port 1-3 */
+ .open_drain = true,
+};
+
static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
static struct ar8327_platform_data db120_ar8327_data = {
.pad0_cfg = &db120_ar8327_pad0_cfg,
- .cpuport_cfg = {
+ .port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
- }
+ },
+ .led_cfg = &wr1041n_v2_ar8327_led_cfg,
+ .num_leds = ARRAY_SIZE(tl_wr1041n_leds_ar8327),
+ .leds = tl_wr1041n_leds_ar8327
};
static struct mdio_board_info db120_mdio0_info[] = {
},
};
-static void __init db120_gmac_setup(void)
-{
- void __iomem *base;
- u32 t;
-
- base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
-
- t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
- t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
- AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
- t |= AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE;
-
- __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
-
- iounmap(base);
-}
-
static void __init tl_wr1041nv2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
tl_wr1041nv2_gpio_keys);
ath79_register_wmac(ee, mac);
- db120_gmac_setup();
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
+ AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(1, 0x0);
ath79_register_mdio(0, 0x0);