ar71xx: mach-rbspi: simplify reset button registration

[oweals/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb922.c

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c
index 577fb0eee06a4ffbfdc3966f685e51f82838d2a0..2f54d029f67898ab1b6ab5d8838d9515c11e719f 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c
@@ -195,7 +195,9 @@ static int rb922gs_nand_scan_fixup(struct mtd_info *mtd)
 {
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
        struct nand_chip *chip = mtd->priv;
-#endif
+#else
+       struct nand_chip *chip = mtd_to_nand(mtd);
+#endif /* < 4.6.0 */
 
        if (mtd->writesize == 512) {
                /*
@@ -209,6 +211,8 @@ static int rb922gs_nand_scan_fixup(struct mtd_info *mtd)
 #endif
        }
 
+       chip->options = NAND_NO_SUBPAGE_WRITE;
+
        return 0;
 }
 
@@ -252,7 +256,7 @@ static void __init rb922gs_setup(void)
        if (!info)
                return;
 
-       scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
+       scnprintf(buf, sizeof(buf), "MikroTik RouterBOARD %s",
                  (info->board_name) ? info->board_name : "");
        mips_set_machine_name(buf);
 
@@ -272,9 +276,16 @@ static void __init rb922gs_setup(void)
        ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
        ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
        ath79_eth0_data.phy_mask = BIT(RB922_PHY_ADDR);
-       ath79_eth0_pll_data.pll_10 = 0x81001313;
-       ath79_eth0_pll_data.pll_100 = 0x81000101;
-       ath79_eth0_pll_data.pll_1000 = 0x8f000000;
+       if (strcmp(info->board_name, "921GS-5HPacD r2") == 0) {
+               ath79_eth0_pll_data.pll_10 = 0xa0001313;
+               ath79_eth0_pll_data.pll_100 = 0xa0000101;
+               ath79_eth0_pll_data.pll_1000 = 0x8f000000;
+       }
+       else {
+               ath79_eth0_pll_data.pll_10 = 0x81001313;
+               ath79_eth0_pll_data.pll_100 = 0x81000101;
+               ath79_eth0_pll_data.pll_1000 = 0x8f000000;
+       }
 
        ath79_register_eth(0);