ar71xx: mach-rbspi: simplify reset button registration

[oweals/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-archer-c59-v1.c

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c
index f385d4a5a3148b83ee01007145e0eda2c0ef670f..c500c91a1a38892572106e9e5ab547d6741306a9 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c
@@ -43,15 +43,15 @@
 #define ARCHER_C59_GPIO_SHIFT_SRCLR            19
 #define ARCHER_C59_GPIO_SHIFT_RCLK             20
 
-#define ARCHER_C59_74HC_GPIO_BASE              QCA956X_GPIO_COUNT
-#define ARCHER_C59_74HC_GPIO_LED_POWER         23
-#define ARCHER_C59_74HC_GPIO_LED_WLAN2         24
-#define ARCHER_C59_74HC_GPIO_LED_WLAN5         25
-#define ARCHER_C59_74HC_GPIO_LED_LAN           26
-#define ARCHER_C59_74HC_GPIO_LED_WAN_GREEN     27
-#define ARCHER_C59_74HC_GPIO_LED_WAN_AMBER     28
-#define ARCHER_C59_74HC_GPIO_LED_WPS           29
-#define ARCHER_C59_74HC_GPIO_LED_USB           30
+#define ARCHER_C59_74HC_GPIO_BASE              32
+#define ARCHER_C59_74HC_GPIO_LED_POWER         (ARCHER_C59_74HC_GPIO_BASE + 0)
+#define ARCHER_C59_74HC_GPIO_LED_WLAN2         (ARCHER_C59_74HC_GPIO_BASE + 1)
+#define ARCHER_C59_74HC_GPIO_LED_WLAN5         (ARCHER_C59_74HC_GPIO_BASE + 2)
+#define ARCHER_C59_74HC_GPIO_LED_LAN           (ARCHER_C59_74HC_GPIO_BASE + 3)
+#define ARCHER_C59_74HC_GPIO_LED_WAN_GREEN     (ARCHER_C59_74HC_GPIO_BASE + 4)
+#define ARCHER_C59_74HC_GPIO_LED_WAN_AMBER     (ARCHER_C59_74HC_GPIO_BASE + 5)
+#define ARCHER_C59_74HC_GPIO_LED_WPS           (ARCHER_C59_74HC_GPIO_BASE + 6)
+#define ARCHER_C59_74HC_GPIO_LED_USB           (ARCHER_C59_74HC_GPIO_BASE + 7)
 
 #define ARCHER_C59_V1_SSR_BIT_0                        0
 #define ARCHER_C59_V1_SSR_BIT_1                        1
@@ -180,7 +180,7 @@ static struct spi_gpio_platform_data archer_c59_v1_spi_data = {
        .num_chipselect = 1,
 };
 
-static u8 archer_c59_v1_ssr_initdata[] __initdata = {
+static u8 archer_c59_v1_ssr_initdata[] = {
        BIT(ARCHER_C59_V1_SSR_BIT_7) |
        BIT(ARCHER_C59_V1_SSR_BIT_6) |
        BIT(ARCHER_C59_V1_SSR_BIT_5) |
@@ -249,7 +249,7 @@ static void __init archer_c5x_v1_setup(void)
        ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
        ath79_eth1_data.speed = SPEED_1000;
        ath79_eth1_data.duplex = DUPLEX_FULL;
-       ath79_switch_data.phy_poll_mask |= BIT(4);
+       ath79_switch_data.phy_poll_mask |= BIT(0);
        ath79_switch_data.phy4_mii_en = 1;
        ath79_register_eth(1);