ar71xx: fixup allowed PHY interface types for QCA9558
[oweals/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / dev-eth.c
index 4487958bc78cd7cd82e801d55ee633fa34df2988..7975464333a930c0ad73f36c35873307e4a5c8ec 100644 (file)
@@ -605,7 +605,6 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
                case ATH79_SOC_AR9341:
                case ATH79_SOC_AR9342:
                case ATH79_SOC_AR9344:
-               case ATH79_SOC_QCA9558:
                        switch (pdata->phy_if_mode) {
                        case PHY_INTERFACE_MODE_MII:
                        case PHY_INTERFACE_MODE_GMII:
@@ -617,6 +616,17 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
                        }
                        break;
 
+               case ATH79_SOC_QCA9558:
+                       switch (pdata->phy_if_mode) {
+                       case PHY_INTERFACE_MODE_MII:
+                       case PHY_INTERFACE_MODE_RGMII:
+                       case PHY_INTERFACE_MODE_SGMII:
+                               break;
+                       default:
+                               return -EINVAL;
+                       }
+                       break;
+
                default:
                        BUG();
                }
@@ -654,7 +664,6 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
                case ATH79_SOC_AR9341:
                case ATH79_SOC_AR9342:
                case ATH79_SOC_AR9344:
-               case ATH79_SOC_QCA9558:
                        switch (pdata->phy_if_mode) {
                        case PHY_INTERFACE_MODE_MII:
                        case PHY_INTERFACE_MODE_GMII:
@@ -664,6 +673,17 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
                        }
                        break;
 
+               case ATH79_SOC_QCA9558:
+                       switch (pdata->phy_if_mode) {
+                       case PHY_INTERFACE_MODE_MII:
+                       case PHY_INTERFACE_MODE_RGMII:
+                       case PHY_INTERFACE_MODE_SGMII:
+                               break;
+                       default:
+                               return -EINVAL;
+                       }
+                       break;
+
                default:
                        BUG();
                }
@@ -691,6 +711,30 @@ void __init ath79_setup_ar933x_phy4_switch(bool mac, bool mdio)
        iounmap(base);
 }
 
+void __init ath79_setup_ar934x_eth_cfg(u32 mask)
+{
+       void __iomem *base;
+       u32 t;
+
+       base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
+
+       t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
+
+       t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 |
+              AR934X_ETH_CFG_MII_GMAC0 |
+              AR934X_ETH_CFG_GMII_GMAC0 |
+              AR934X_ETH_CFG_SW_ONLY_MODE |
+              AR934X_ETH_CFG_SW_PHY_SWAP);
+
+       t |= mask;
+
+       __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
+       /* flush write */
+       __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
+
+       iounmap(base);
+}
+
 static int ath79_eth_instance __initdata;
 void __init ath79_register_eth(unsigned int id)
 {
@@ -897,6 +941,7 @@ void __init ath79_register_eth(unsigned int id)
        switch (pdata->phy_if_mode) {
        case PHY_INTERFACE_MODE_GMII:
        case PHY_INTERFACE_MODE_RGMII:
+       case PHY_INTERFACE_MODE_SGMII:
                if (!pdata->has_gbit) {
                        printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
                                        id);
@@ -919,7 +964,6 @@ void __init ath79_register_eth(unsigned int id)
                case ATH79_SOC_AR9341:
                case ATH79_SOC_AR9342:
                case ATH79_SOC_AR9344:
-               case ATH79_SOC_QCA9558:
                        if (id == 0)
                                pdata->mii_bus_dev = &ath79_mdio0_device.dev;
                        else
@@ -932,6 +976,10 @@ void __init ath79_register_eth(unsigned int id)
                        pdata->mii_bus_dev = &ath79_mdio1_device.dev;
                        break;
 
+               case ATH79_SOC_QCA9558:
+                       /* don't assign any MDIO device by default */
+                       break;
+
                default:
                        pdata->mii_bus_dev = &ath79_mdio0_device.dev;
                        break;