break;
case AR71XX_SOC_AR7240:
+ case AR71XX_SOC_AR7241:
+ case AR71XX_SOC_AR7242:
+ case AR71XX_SOC_AR9342:
+ case AR71XX_SOC_AR9344:
ret = ar724x_pcibios_map_irq(dev, slot, pin);
break;
int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
{
+ u32 t;
int ret = 0;
switch (ar71xx_soc) {
break;
case AR71XX_SOC_AR7240:
- ret = ar724x_pcibios_init();
+ case AR71XX_SOC_AR7241:
+ case AR71XX_SOC_AR7242:
+ ret = ar724x_pcibios_init(AR71XX_CPU_IRQ_IP2);
break;
+ case AR71XX_SOC_AR9342:
+ case AR71XX_SOC_AR9344:
+ t = ar71xx_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
+ if (t & AR934X_BOOTSTRAP_PCIE_RC) {
+ ret = ar724x_pcibios_init(AR934X_IP2_IRQ_PCIE);
+ break;
+ }
+
+ /* fall through */
default:
return 0;
}