ar71xx: build ALFA AP96 images with default profile as well
[oweals/openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / devices.c
index 109dda585359fe6b0afa8a83504ff8b2123e7d03..75b24b0043a5688639074bef96f1965245c55976 100644 (file)
@@ -527,6 +527,8 @@ struct platform_device ar71xx_eth1_device = {
        },
 };
 
+struct ag71xx_switch_platform_data ar71xx_switch_data;
+
 #define AR71XX_PLL_VAL_1000    0x00110000
 #define AR71XX_PLL_VAL_100     0x00001099
 #define AR71XX_PLL_VAL_10      0x00991099
@@ -766,30 +768,39 @@ void __init ar71xx_add_device_eth(unsigned int id)
 
        switch (ar71xx_soc) {
        case AR71XX_SOC_AR7130:
-               pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
-                                     : ar71xx_ddr_flush_ge0;
-               pdata->set_speed = id ? ar71xx_set_speed_ge1
-                                     : ar71xx_set_speed_ge0;
+               if (id == 0) {
+                       pdata->ddr_flush = ar71xx_ddr_flush_ge0;
+                       pdata->set_speed = ar71xx_set_speed_ge0;
+               } else {
+                       pdata->ddr_flush = ar71xx_ddr_flush_ge1;
+                       pdata->set_speed = ar71xx_set_speed_ge1;
+               }
                break;
 
        case AR71XX_SOC_AR7141:
        case AR71XX_SOC_AR7161:
-               pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
-                                     : ar71xx_ddr_flush_ge0;
-               pdata->set_speed = id ? ar71xx_set_speed_ge1
-                                     : ar71xx_set_speed_ge0;
+               if (id == 0) {
+                       pdata->ddr_flush = ar71xx_ddr_flush_ge0;
+                       pdata->set_speed = ar71xx_set_speed_ge0;
+               } else {
+                       pdata->ddr_flush = ar71xx_ddr_flush_ge1;
+                       pdata->set_speed = ar71xx_set_speed_ge1;
+               }
                pdata->has_gbit = 1;
                break;
 
        case AR71XX_SOC_AR7242:
-               ar71xx_eth0_data.reset_bit |= AR724X_RESET_GE0_MDIO |
-                                             RESET_MODULE_GE0_PHY;
-               ar71xx_eth1_data.reset_bit |= AR724X_RESET_GE1_MDIO |
-                                             RESET_MODULE_GE1_PHY;
-               pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
-                                     : ar724x_ddr_flush_ge0;
-               pdata->set_speed = id ? ar724x_set_speed_ge1
-                                     : ar7242_set_speed_ge0;
+               if (id == 0) {
+                       pdata->reset_bit |= AR724X_RESET_GE0_MDIO |
+                                           RESET_MODULE_GE0_PHY;
+                       pdata->ddr_flush = ar724x_ddr_flush_ge0;
+                       pdata->set_speed = ar7242_set_speed_ge0;
+               } else {
+                       pdata->reset_bit |= AR724X_RESET_GE1_MDIO |
+                                           RESET_MODULE_GE1_PHY;
+                       pdata->ddr_flush = ar724x_ddr_flush_ge1;
+                       pdata->set_speed = ar724x_set_speed_ge1;
+               }
                pdata->has_gbit = 1;
                pdata->is_ar724x = 1;
 
@@ -802,16 +813,28 @@ void __init ar71xx_add_device_eth(unsigned int id)
                break;
 
        case AR71XX_SOC_AR7241:
-               ar71xx_eth0_data.reset_bit |= AR724X_RESET_GE0_MDIO;
-               ar71xx_eth1_data.reset_bit |= AR724X_RESET_GE1_MDIO;
+               if (id == 0)
+                       pdata->reset_bit |= AR724X_RESET_GE0_MDIO;
+               else
+                       pdata->reset_bit |= AR724X_RESET_GE1_MDIO;
                /* fall through */
        case AR71XX_SOC_AR7240:
-               ar71xx_eth0_data.reset_bit |= RESET_MODULE_GE0_PHY;
-               ar71xx_eth1_data.reset_bit |= RESET_MODULE_GE1_PHY;
-               pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
-                                     : ar724x_ddr_flush_ge0;
-               pdata->set_speed = id ? ar724x_set_speed_ge1
-                                     : ar724x_set_speed_ge0;
+               if (id == 0) {
+                       pdata->reset_bit |= RESET_MODULE_GE0_PHY;
+                       pdata->ddr_flush = ar724x_ddr_flush_ge0;
+                       pdata->set_speed = ar724x_set_speed_ge0;
+
+                       pdata->phy_mask = BIT(4);
+               } else {
+                       pdata->reset_bit |= RESET_MODULE_GE1_PHY;
+                       pdata->ddr_flush = ar724x_ddr_flush_ge1;
+                       pdata->set_speed = ar724x_set_speed_ge1;
+
+                       pdata->speed = SPEED_1000;
+                       pdata->duplex = DUPLEX_FULL;
+                       pdata->switch_data = &ar71xx_switch_data;
+               }
+               pdata->has_gbit = 1;
                pdata->is_ar724x = 1;
                if (ar71xx_soc == AR71XX_SOC_AR7240)
                        pdata->is_ar7240 = 1;
@@ -825,32 +848,48 @@ void __init ar71xx_add_device_eth(unsigned int id)
                break;
 
        case AR71XX_SOC_AR9130:
-               pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
-                                     : ar91xx_ddr_flush_ge0;
-               pdata->set_speed = id ? ar91xx_set_speed_ge1
-                                     : ar91xx_set_speed_ge0;
+               if (id == 0) {
+                       pdata->ddr_flush = ar91xx_ddr_flush_ge0;
+                       pdata->set_speed = ar91xx_set_speed_ge0;
+               } else {
+                       pdata->ddr_flush = ar91xx_ddr_flush_ge1;
+                       pdata->set_speed = ar91xx_set_speed_ge1;
+               }
                pdata->is_ar91xx = 1;
                break;
 
        case AR71XX_SOC_AR9132:
-               pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
-                                     : ar91xx_ddr_flush_ge0;
-               pdata->set_speed = id ? ar91xx_set_speed_ge1
-                                     : ar91xx_set_speed_ge0;
+               if (id == 0) {
+                       pdata->ddr_flush = ar91xx_ddr_flush_ge0;
+                       pdata->set_speed = ar91xx_set_speed_ge0;
+               } else {
+                       pdata->ddr_flush = ar91xx_ddr_flush_ge1;
+                       pdata->set_speed = ar91xx_set_speed_ge1;
+               }
                pdata->is_ar91xx = 1;
                pdata->has_gbit = 1;
                break;
 
        case AR71XX_SOC_AR9330:
        case AR71XX_SOC_AR9331:
-               ar71xx_eth0_data.reset_bit = AR933X_RESET_GE0_MAC |
-                                            AR933X_RESET_GE0_MDIO;
-               ar71xx_eth1_data.reset_bit = AR933X_RESET_GE1_MAC |
-                                            AR933X_RESET_GE1_MDIO;
-               pdata->ddr_flush = id ? ar933x_ddr_flush_ge1
-                                     : ar933x_ddr_flush_ge0;
-               pdata->set_speed = id ? ar933x_set_speed_ge1
-                                     : ar933x_set_speed_ge0;
+               if (id == 0) {
+                       pdata->reset_bit = AR933X_RESET_GE0_MAC |
+                                          AR933X_RESET_GE0_MDIO;
+                       pdata->ddr_flush = ar933x_ddr_flush_ge0;
+                       pdata->set_speed = ar933x_set_speed_ge0;
+
+                       pdata->phy_mask = BIT(4);
+               } else {
+                       pdata->reset_bit = AR933X_RESET_GE1_MAC |
+                                          AR933X_RESET_GE1_MDIO;
+                       pdata->ddr_flush = ar933x_ddr_flush_ge1;
+                       pdata->set_speed = ar933x_set_speed_ge1;
+
+                       pdata->speed = SPEED_1000;
+                       pdata->duplex = DUPLEX_FULL;
+                       pdata->switch_data = &ar71xx_switch_data;
+               }
+
                pdata->has_gbit = 1;
                pdata->is_ar724x = 1;
 
@@ -865,14 +904,20 @@ void __init ar71xx_add_device_eth(unsigned int id)
        case AR71XX_SOC_AR9341:
        case AR71XX_SOC_AR9342:
        case AR71XX_SOC_AR9344:
-               ar71xx_eth0_data.reset_bit = AR934X_RESET_GE0_MAC |
-                                            AR934X_RESET_GE0_MDIO;
-               ar71xx_eth1_data.reset_bit = AR934X_RESET_GE1_MAC |
-                                            AR934X_RESET_GE1_MDIO;
-               pdata->ddr_flush = id ? ar934x_ddr_flush_ge1
-                                     : ar934x_ddr_flush_ge0;
-               pdata->set_speed = id ? ar934x_set_speed_ge1
-                                     : ar934x_set_speed_ge0;
+               if (id == 0) {
+                       pdata->reset_bit = AR934X_RESET_GE0_MAC |
+                                          AR934X_RESET_GE0_MDIO;
+                       pdata->ddr_flush =ar934x_ddr_flush_ge0;
+                       pdata->set_speed = ar934x_set_speed_ge0;
+               } else {
+                       pdata->reset_bit = AR934X_RESET_GE1_MAC |
+                                          AR934X_RESET_GE1_MDIO;
+                       pdata->ddr_flush = ar934x_ddr_flush_ge1;
+                       pdata->set_speed = ar934x_set_speed_ge1;
+
+                       pdata->switch_data = &ar71xx_switch_data;
+               }
+
                pdata->has_gbit = 1;
                pdata->is_ar724x = 1;
 
@@ -1010,9 +1055,9 @@ static int __init ar71xx_kmac_setup(char *str)
 __setup("kmac=", ar71xx_kmac_setup);
 
 void __init ar71xx_init_mac(unsigned char *dst, const unsigned char *src,
-                           unsigned offset)
+                           int offset)
 {
-       u32 t;
+       int t;
 
        if (!is_valid_ether_addr(src)) {
                memset(dst, '\0', ETH_ALEN);