configs: Resync with savedefconfig
[oweals/u-boot.git] / include / ppc_asm.tmpl
index ba166ebdd4d62a16ae38234bba269a6e45019b9e..db7b1668d99a60ecd3992f0e090b37a7f0c23e00 100644 (file)
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2000-2002
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -81,8 +80,7 @@
 #define        r30     30
 #define        r31     31
 
-
-#if defined(CONFIG_8xx)
+#if defined(CONFIG_MPC8xx)
 
 /* Some special registers */
 
 #define LCTRL2 157     /* Load/Store Support       (37-41) */
 #define ICTRL  158
 
-#endif /* CONFIG_8xx */
-
+#endif /* CONFIG_MPC8xx */
 
-#if  defined(CONFIG_5xx)
-/* Some special purpose registers */
-#define DER    149             /* Debug Enable Register                */
-#define COUNTA 150             /* Breakpoint Counter                   */
-#define COUNTB 151             /* Breakpoint Counter                   */
-#define LCTRL1 156             /* Load/Store Support                   */
-#define LCTRL2 157             /* Load/Store Support                   */
-#define ICTRL  158             /* I-Bus Support Control Register       */
-#define EID    81
-#endif /* CONFIG_5xx */
 
-#if defined(CONFIG_8xx)
+#if defined(CONFIG_MPC8xx)
 
 /* Registers in the processor's internal memory map that we use.
 */
 
 #define PLPRCR 0x00000284
 
-#elif defined(CONFIG_MPC8260)
-
-#define HID2           1011
-
-#define HID0_IFEM      (1<<7)
-
-#define HID0_ICE_BITPOS        16
-#define HID0_DCE_BITPOS        17
-
-#define IM_REGBASE     0x10000
-#define IM_SYPCR       (IM_REGBASE+0x0004)
-#define IM_SWSR                (IM_REGBASE+0x000e)
-#define IM_BR0         (IM_REGBASE+0x0100)
-#define IM_OR0         (IM_REGBASE+0x0104)
-#define IM_BR1         (IM_REGBASE+0x0108)
-#define IM_OR1         (IM_REGBASE+0x010c)
-#define IM_BR2         (IM_REGBASE+0x0110)
-#define IM_OR2         (IM_REGBASE+0x0114)
-#define IM_MPTPR       (IM_REGBASE+0x0184)
-#define IM_PSDMR       (IM_REGBASE+0x0190)
-#define IM_PSRT                (IM_REGBASE+0x019c)
-#define IM_IMMR                (IM_REGBASE+0x01a8)
-#define IM_SCCR                (IM_REGBASE+0x0c80)
-
-#elif defined(CONFIG_MPC5xxx)
-
-#define HID0_ICE_BITPOS        16
-#define HID0_DCE_BITPOS        17
-
 #endif
 
 #define curptr r2
        b       transfer_to_handler
 
 #define STD_EXCEPTION(n, label, hdlr)                          \
+.align 4;                                                      \
 label:                                                         \
        EXCEPTION_PROLOG(SRR0, SRR1);                           \
        addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
        EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY)   \
 
 #define CRIT_EXCEPTION(n, label, hdlr)                         \
+.align 4;                                                      \
 label:                                                         \
        EXCEPTION_PROLOG(CSRR0, CSRR1);                         \
        addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
@@ -276,6 +236,7 @@ label:                                                              \
        MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 
 #define MCK_EXCEPTION(n, label, hdlr)                          \
+.align 4;                                                      \
 label:                                                         \
        EXCEPTION_PROLOG(MCSRR0, MCSRR1);                       \
        addi    r3,r1,STACK_FRAME_OVERHEAD;                     \